MK2049-36SITR

Manufacturer Part NumberMK2049-36SITR
DescriptionIC VCXO PLL CLK SYNTH 20-SOIC
ManufacturerIDT, Integrated Device Technology Inc
TypePLL Clock Synthesizer
MK2049-36SITR datasheet
 


Specifications of MK2049-36SITR

PllYesInputClock
OutputClockNumber Of Circuits1
Ratio - Input:output1:3Differential - Input:outputNo/No
Frequency - Max77.76MHzDivider/multiplierYes/Yes
Voltage - Supply3.15 V ~ 3.45 VOperating Temperature-40°C ~ 85°C
Mounting TypeSurface MountPackage / Case20-SOIC
Frequency-max44.736MHzLead Free Status / RoHS StatusContains lead / RoHS non-compliant
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3.3 VOLT COMMUNICATIONS CLOCK PLL
Description
The MK2049-36 is a Phased Locked Loop (PLL) based
clock synthesizer that accepts multiple input frequencies.
With an 8 kHz clock input as a reference, the MK2049-36
generates T1, E1, T3, E3, OC3 and other communications
frequencies. This allows for the generation of clocks
frequency-locked to an 8 kHz backplane clock, simplifying
clock synchronization in communications systems.
This part also has a jitter-attenuated Buffer capability. In this
mode, the MK2049-36 is ideal for filtering jitter from clocks
with high jitter.
IDT can customize these devices for many other different
frequencies. Contact your IDT representative for more
details.
Block Diagram
I
R
NPUT
EFERENCE
C
LOCK
(T
8
H
)
YPICALLY
K
Z
4
F
S
REQUENCY
ELECT
IDT® 3.3 VOLT COMMUNICATIONS CLOCK PLL
Features
Packaged in 20 pin SOIC
Pb (lead) free package
3.3 V + 5% operation
Meets the TR62411, ETS300 011, and GR-1244
specification for MTIE, Pull-in/Hold-in Range, Phase
Transients, and Jitter Generation for Stratum 3, 4, and 4E
Accepts multiple inputs: 8 kHz backplane clock or 10 to
50 MHz
Locks to 8 kHz + 100 ppm (External mode)
Buffer Mode allows jitter attenuation of 10 - 50 MHz input
and x1/x0.5 or x1/x2 outputs
Exact internal ratios enable zero ppm error
Output clock rates include T1, E1, T3, E3, and OC3
submultiples
See also the MK2049-34 and MK2049-45
E
P
C
XTERNAL
ULLABLE
F
VCXO-B
REQUENCY
ASED
M
PLL
ULTIPLYING
PLL
(M
C
ASTER
LOCK
G
)
ENERATOR
1
DATASHEET
MK2049-36
RYSTAL
C
O
LOCK
UTPUT
2
C
O
LOCK
UTPUT
8
H
(R
K
Z
EGENERATED
MK2049-36
/ 2
)
REV G 051310

MK2049-36SITR Summary of contents

  • Page 1

    ... Description The MK2049- Phased Locked Loop (PLL) based clock synthesizer that accepts multiple input frequencies. With an 8 kHz clock input as a reference, the MK2049-36 generates T1, E1, T3, E3, OC3 and other communications frequencies. This allows for the generation of clocks frequency-locked kHz backplane clock, simplifying clock synchronization in communications systems ...

  • Page 2

    ... Power Supply. Connect to +3.3 V. Loop Connect the loop filter ceramic capacitors and resistor between this pin and Filter CAP2. Power Connect to ground. Loop Connect the loop filter ceramic capacitors and resistor between this pin and 2 VCXO AND SYNTHESIZER Pin Description MK2049-36 REV G 051310 ...

  • Page 3

    ... VDD or leave open. Crystal is connected to pins 2 and 3; clock input is applied to pin 13. Operating Modes The MK2049-36 has two operating modes: External and Buffer. Although both modes use an input clock to generate various output clocks, there are important differences in their input and crystal requirements. External Mode The MK2049-36 accepts an external 8 kHz clock and will produce a number of common communication clock frequencies. The 8 kHz input clock does not need to have a 50% duty cycle ...

  • Page 4

    ... The typical telecom reference frequency is accurate to much less than 1 ppm, so the MK2049 may lock and run properly even if the board capacitance is not adjusted with these fixed capacitors. However, IDT recommends that the adjustment capacitors be included to minimize the effects of variation in individual crystals, temperature, and aging ...

  • Page 5

    ... Crystal Operation The MK2049-36 operates by phase locking the input signal to a VCXO which consists of the recommended pullable VCXO crystals and the integrated VCXO oscillator circuit on the MK2049. To achieve the best performance and reliability, the layout guidelines shown on the previous page should be closely followed. ...

  • Page 6

    ... External Mode, Note 1 ICLK t pi ICLK to 8 kHz t 0 2 VDD/2, except 8 kHz Any clock selection 6 VCXO AND SYNTHESIZER Min. Typ. Max. Units 3.15 3.3 3. 0.8 V VDD-0.4 V 2 ± 350 k Min. Typ. Max. Units 8 kHz ppm MK2049-36 REV G 051310 ...

  • Page 7

    ... MK2049-36SILF MK2049-36SILF MK2049-36SILFTR MK2049-36SILF "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied ...

  • Page 8

    ... MK2049-36 3.3 VOLT COMMUNICATIONS CLOCK PLL Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Integrated Device Technology, Inc. www.idt.com © 2010 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated Device Technology, Inc ...