MK2049-45SITR IDT, Integrated Device Technology Inc, MK2049-45SITR Datasheet - Page 3

• Manufacturer Part Number: MK2049-45SITR
• Description: IC CLK PLL COMM 3.3V 20-SOIC
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: PLL Clock Synthesizerr

Specifications of MK2049-45SITR

• Pll: Yes
• Input: Clock
• Output: Clock
• Number Of Circuits: 1
• Ratio - Input:output: 1:3
• Differential - Input:output: No/No
• Frequency - Max: 49.152MHz
• Divider/multiplier: Yes/Yes
• Voltage - Supply: 3.15 V ~ 3.45 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC
• Frequency-max: 49.152MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Output Decoding Table - External Mode (MHz)
Output Decoding Table - Buffer Mode (MHz)
0 = connect directly to ground, 1 = connect directly to VDD
Crystal is connected to pins 2 and 3; clock input is applied to pin 13.
Functional Description
The MK2049-45 is a clock generator IC that generates an
output clock directly from an internal VCXO circuit which
works in conjunction with an external quartz crystal. The
VCXO is controlled by an internal PLL (Phase Locked Loop)
circuit, enabling the device to perform clock regeneration
from an input reference clock. The MK2049-45 is configured
to provide a high frequency communications reference clock
output from an 8 kHz input clock or to jitter attenuate and
IDT™ / ICS™ 3.3 VOLT COMMUNICATIONS CLOCK PLL
20 - 50
10 - 25
8 kHz
8 kHz
8 kHz
8 kHz
8 kHz
8 kHz
8 kHz
8 kHz
8 kHz
8 kHz
8 kHz
8 kHz
8 kHz
8 kHz
MK2049-45
3.3 VOLT COMMUNICATIONS CLOCK PLL
ICLK
ICLK
Number
FS3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
Pin
FS3
18
19
20
1
1
FS2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
FS2
1
1
Name
CAP2
RES
Pin
FS0
FS1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
FS1
1
1
FS0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Type
Loop
Filter
Input
Pin
-
FS0
0
1
22.368
17.184
18.528
12.352
24.576
16.384
CLK/2
1.544
2.048
19.44
25.92
4.096
17.28
12.8
62.5
Connect the loop filter capacitors and resistor between this pin and CAP1.
Connect a resistor to ground. See table.
Frequency select 0. Determines CLK input/outputs per table on page 2.
Internal pull-up resistor.
ICLK/2
CLK/2
ICLK
44.736
34.368
37.056
24.704
49.152
32.768
3.088
4.096
38.88
51.84
8.192
34.56
CLK
25.6
125
2*ICLK
ICLK
CLK
3
buffer a high frequency input clock. There are 14 selectable
output frequencies and two buffer mode selections. Please
refer to the Output Clock Selection Table on Page 2.
Most typical PLL clock devices use an internal VCO (Voltage
Controlled Oscillator) for output clock generation. By using
a VCXO with an external crystal, the MK2049-45 is able to
generate a low jitter, low phase-noise output clock within a
8 kHz
8 kHz
8 kHz
8 kHz
8 kHz
8 kHz
8 kHz
8 kHz
8 kHz
8 kHz
8 kHz
8 kHz
8 kHz
8 kHz
8k
Pin Description
N/A
N/A
8k
Used (MHz)
Crystal
24.576
24.576
24.576
24.576
16.384
24.704
24.704
16.384
16.384
19.44
17.28
17.28
25.6
25
Crystal
ICLK/2
ICLK
3072
3072
3072
3072
2430
3200
2160
2048
3088
3088
2048
2048
2160
3125
N
N
3
3
VCXO AND SYNTHESIZER
MK2049-45
REV G 101904