MK2049-45ASI IDT, Integrated Device Technology Inc, MK2049-45ASI Datasheet - Page 4

• Manufacturer Part Number: MK2049-45ASI
• Description: IC CLK PLL COMM 3.3V 20-SOIC
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: PLL Clock Synthesizerr

Specifications of MK2049-45ASI

• Pll: Yes
• Input: Clock
• Output: Clock
• Number Of Circuits: 1
• Ratio - Input:output: 1:3
• Differential - Input:output: No/No
• Frequency - Max: 49.152MHz
• Divider/multiplier: Yes/Yes
• Voltage - Supply: 3.15 V ~ 3.45 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC
• Frequency-max: 49.152MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

generate a low jitter, low phase-noise output clock within a
low bandwidth PLL. This serves to provide input clock jitter
attenuation and enables stable operation with a low
frequency reference clock.
The VCXO circuit requires an external pullable crystal for
operation. External loop filter components enable a PLL
configuration with low loop bandwidth.
Application Information
Output Frequency Configuration
The MK2049-45A is configured to generate a set of output
frequencies from an 8 kHz input clock. Please refer to the
Output Clock Selection Table on Page 2. Input bits FS3:0
are set according to this table, as is the external crystal
frequency. Please refer to the Quartz Crystal section on this
page regarding external crystal requirements.
Quartz Crystal
It is important that the correct type of quartz crystal is used
with the MK2049-45A. Failure to do so may result in reduced
frequency pullability range, inability of the loop to lock, or
excessive output phase jitter.
The MK2049-45A operates by phase-locking the VCXO
circuit to the input signal of the selected ICLK input. The
VCXO consists of the external crystal and the integrated
VCXO oscillator circuit. To achieve the best performance
and reliability, a crystal device with the recommended
parameters (shown below) must be used, and the layout
guidelines discussed in the PCB Layout Recommendations
section must be followed.
The frequency of oscillation of a quartz crystal is determined
by its cut and by the external load capacitance. The
MK2049-45A incorporates variable load capacitors on-chip
which “pull”, or change, the frequency of the crystal. The
crystals specified for use with the MK2049-45A are
designed to have zero frequency error when the total of
on-chip + stray capacitance is 14 pF. To achieve this, the
layout should use short traces between the MK2049-45A
and the crystal.
A complete description of the recommended crystal
parameters in the IDT application note, MAN05.
IDT™ 3.3 VOLT COMMUNICATIONS CLOCK PLL
MK2049-45A
3.3 VOLT COMMUNICATIONS CLOCK PLL
4
To obtain a list of qualified crystal devices please visit our
website.
PLL Loop Filter Components
All analog PLL circuits use a loop filter to establish operating
stability. The MK2049-45A uses external loop filter
components for the following reasons:
1) Larger loop filter capacitor values can be used, allowing
a lower loop bandwidth. This enables the use of lower input
clock reference frequencies and also input clock jitter
attenuation capabilities. Larger loop filter capacitors also
allow higher loop damping factors when less passband
peaking is desired.
2) The loop filter values can be user selected to optimize
loop response characteristics for a given application.
Referencing the External Component Schematic on this
page, the external loop filter is made up of components R
C
therefore influences loop filter characteristics.
Tools for optimizing the values of these four components
can be found on our web site.
S
and C
P
. R
Figure 3. Typical Loop Filter
SET
CAP2
CAP1
establishes PLL charge pump current and
0.0003 µF
C
P
VCXO AND SYNTHESIZER
MK2049-45A
R
C
S
S
820 kohms
0.1 µF
REV C 051310
S
,