MPC9772FA Freescale Semiconductor, MPC9772FA Datasheet
MPC9772FA
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MPC9772FA Summary of contents
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... Freescale Semiconductor, Inc. MOTOROLA SEMICONDUCTOR TECHNICAL DATA 3.3V 1:12 LVCMOS PLL Clock Generator The MPC9772 is a 3.3V compatible, 1:12 PLL based clock generator targeted for high performance low-skew clock distribution in mid-range to high-performance networking, computing and telecom applications. With output frequencies up to 240 MHz and output skews less than 250 ps the device meets the needs of the most demanding clock applications ...
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... FSEL_A0 QA3 V CC QA2 GND QA1 VCC QA0 GND VCO_SEL Figure 2. MPC9772 52-Lead Package Pinout (Top View) MOTOROLA Freescale Semiconductor, Inc. 0 ÷4, ÷6, ÷8, ÷12 Ref ÷2 VCO 0 ÷4, ÷6, ÷8, ÷ ÷1 ÷2, ÷4, ÷6, ÷8 PLL ÷4, ÷6, ÷8, ÷10 ÷ ...
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... Freescale Semiconductor, Inc. Table 1. Pin Configuration Pin I/O CCLK0 Input LVCMOS CCLK1 Input LVCMOS XTAL_IN, XTAL_OUT Analog FB_IN Input LVCMOS CCLK_SEL Input LVCMOS REF_SEL Input LVCMOS VCO_SEL Input LVCMOS PLL_EN Input LVCMOS MR/OE Input LVCMOS FSEL_A[0:1] Input LVCMOS FSEL_B[0:1] Input LVCMOS ...
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... MOTOROLA Freescale Semiconductor, Inc. Table 5. Output Divider Bank C (N QA[0:3] VCO_SEL VCO÷8 0 VCO÷12 0 VCO÷16 0 VCO÷24 0 VCO÷4 1 VCO÷6 1 VCO÷8 1 VCO÷12 1 QB[0:3] VCO÷8 VCO÷12 VCO÷16 VCO÷20 VCO÷4 VCO÷6 VCO÷8 VCO÷ ...
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... Freescale Semiconductor, Inc. Table 7. General Specifications Symbol Characteristics V Output Termination Voltage TT MM ESD Protection (Machine Model) HBM ESD Protection (Human Body Model) LU Latch-Up Immunity C Power Dissipation Capacitance PD C Input Capacitance IN Table 8. Absolute Maximum Ratings Symbol Characteristics V Supply Voltage Input Voltage Output Voltage ...
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... F t Output Disable Time PLZ Output Enable Time PZL Cycle-to-cycle Jitter JIT(CC Period Jitter JIT(PER) MOTOROLA Freescale Semiconductor, Inc –40° to +85°C) A Min Typ ÷4 feedback 50.0 ÷6 feedback 33.3 ÷8 feedback 25.0 ÷10 feedback 20.0 ÷12 feedback 16.6 ÷16 feedback 12.5 ÷ ...
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... Freescale Semiconductor, Inc. Table 10. AC Characteristics (V = 3.3V ± 5 Symbol Characteristics I/O Phase Jitter RMS (1 σ JIT(∅ PLL closed loop bandwidth t Maximum PLL Lock Time LOCK 1. AC characteristics apply for parallel output termination of 50Ω bypass mode, the MPC9772 divides the input reference clock. ...
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... MHz QA Outputs 50 – 120 MHz QC Outputs 100 – 240 MHz MOTOROLA Freescale Semiconductor, Inc. APPLICATIONS INFORMATION frequency range while it has no effect on the output to reference frequency ratio. The output frequency for each bank can be derived from the VCO frequency and output divider: ...
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... Freescale Semiconductor, Inc. MPC9772 Individual Output Disable (Clock Stop) Circuitry The individual clock stop (output enable) control of the MPC9772 allows designers, under software control, to implement power management into the clock distribution design. A simple serial interface and a clock stop control logic provides a mechanism through which the MPC9772 clock outputs can be individually stopped in the logic ‘ ...
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... QSYNC QA(÷12) QC(÷2) QSYNC MOTOROLA Freescale Semiconductor, Inc. coincident rising edges of the QA and QC outputs. The duration and the placement of the pulse is dependent QA and QC output frequencies: the QSYNC pulse width is equal to the period of the higher of the QA and QC output frequencies. Figure 6 shows various waveforms for the QSYNC output. The QSYNC output is defined for all possible combinations of the bank A and bank C outputs ...
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... Freescale Semiconductor, Inc. Power Supply Filtering The MPC9772 is a mixed analog/digital product. Its analog circuitry is naturally susceptible to random noise, especially if this noise is seen on the power supply pins. Random noise on the V power supply impacts the device characteristics, CC_PLL for instance I/O jitter. The MPC9772 provides separate power ...
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... FB=÷32 120 100 FB=÷16 80 FB=÷ FB=÷4 0 250 300 350 200 VCO Frequency [MHz] Figure 9. MPC9772 I/O Jitter MOTOROLA Freescale Semiconductor, Inc. 120 100 200 140 120 100 200 PD, LINE(FB) Driving Transmission Lines The MPC9772 clock driver was designed to drive high speed signals in a terminated transmission line environment ...
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... Freescale Semiconductor, Inc. MPC9772 OUTPUT BUFFER 36Ω 14Ω IN MPC9772 OUTPUT 36Ω O BUFFER S 14Ω 36Ω Figure 12. Single versus Dual Transmission Lines The waveform plots in Figure 13. “Single versus Dual Line Termination Waveforms” show the simulation results of an output driving a single line versus two lines. In both cases the drive capability of the MPC9772 output buffer is more than sufficient to drive 50Ω ...
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... Figure 18. Output Duty Cycle (DC N+1 The variation in cycle time of a signal between adjacent cycles, over a random sample of adjacent cycle pairs Figure 20. Cycle-to-Cycle Jitter t F Figure 22. Output Transition Time Test Reference MOTOROLA Freescale Semiconductor, Inc ÷ GND CCLKx V CC ÷ ...
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... Freescale Semiconductor, Inc. 4X 0.20 (0.008 -H- -T- SEATING PLANE 0.05 (0.002 VIEW AA TIMING SOLUTIONS For More Information On This Product, OUTLINE DIMENSIONS FA SUFFIX 52-LEAD LQFP PACKAGE CASE 848D-03 ISSUE TIPS N 0.20 (0.008 VIEW Y - PLATING θ2 0.10 (0.004) T θ3 4X VIEW θ1 0.25 (0.010) θ ...
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... Freescale Semiconductor, Inc. Information in this document is provided solely to enable system and software implementers to use Motorola products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “ ...