DELAY PROG 8-BIT .15NS 16-SOIC

DS1020S-15+T

Manufacturer Part NumberDS1020S-15+T
DescriptionDELAY PROG 8-BIT .15NS 16-SOIC
ManufacturerMaxim Integrated Products
DS1020S-15+T datasheet
 

Specifications of DS1020S-15+T

Number Of Taps/steps256FunctionProgrammable
Delay To 1st Tap10nSTap Increment0.15nS
Available Total Delays48.25nsVoltage - Supply4.75 V ~ 5.25 V
Operating Temperature0°C ~ 70°CMounting TypeSurface Mount
Package / Case16-SOIC (0.300", 7.5mm Width)Lead Free Status / RoHS StatusLead free / RoHS Compliant
Number Of Independent Delays-  
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FEATURES
All-silicon time delay
Models with 0.15 ns, 0.25 ns, 0.5 ns, 1 ns,
and 2 ns steps
Programmable using 3-wire serial port or
8-bit parallel port
Leading and trailing edge accuracy
Standard 16-pin DIP or 16-pin SOIC
Economical
Auto-insertable, low profile
Low-power CMOS
TTL/CMOS-compatible
Vapor phase, IR and wave solderable
DESCRIPTION
The DS1020 Programmable 8-Bit Silicon Delay Line consists of an 8-bit, user-programmable CMOS
silicon integrated circuit. Delay values, programmed using either the 3-wire serial port or the 8-bit
parallel port, can be varied over 256 equal steps. The fastest model (-15) offers a maximum delay of
48.25 ns with an incremental delay of 0.15 ns, while the slowest model (-200) has a maximum delay of
520 ns with an incremental delay of 2 ns. All models have an inherent (step-zero) delay of 10 ns. After
the user-determined delay, the input logic state is reproduced at the output without inversion. The
DS1020 is TTL- and CMOS-compatible, capable of driving 10 74LS-type loads, and features both rising
and falling edge accuracy.
The all-CMOS DS1020 integrated circuit has been designed as a reliable, economic alternative to hybrid
programmable delay lines. It is offered in a standard 16-pin auto-insertable DIP and a space-saving
surface mount 16-pin SOIC.
Programmable 8-Bit
Silicon Delay Line
PIN ASSIGNMENT
IN
1
16
V
CC
E
2
15
OUT
Q/PO
3
14
S
P1
4
13
P7
Q/PO
P2
5
12
P6
P3
6
11
C
P4
7
10
P5
GND
GND
8
9
D
DS1020 16-pin DIP (300-mil)
DS1020S 16-pin SOIC (300-mil)
See Mech. Drawings Section
PIN DESCRIPTION
IN
- Delay Input
P0-P7
- Parallel Program Pins
GND
- Ground
OUT
- Delay Output
V
- +5 Volts
CC
S
- Mode Select
E
- Enable
C
- Serial Port Clock
Q
- Serial Data Output
D
- Serial Data Input
1 of 9
DS1020
IN
1
16
V
CC
E
2
15
OUT
3
14
S
P1
4
13
P7
P2
5
12
P6
P3
6
11
C
P4
7
10
P5
8
9
D
See Mech. Drawings Section
111799

DS1020S-15+T Summary of contents

  • Page 1

    ... Q/ GND GND DS1020 16-pin DIP (300-mil) DS1020S 16-pin SOIC (300-mil) See Mech. Drawings Section PIN DESCRIPTION IN - Delay Input P0-P7 - Parallel Program Pins GND - Ground OUT - Delay Output Volts Mode Select E - Enable C - Serial Port Clock Q - Serial Data Output D - Serial Data Input DS1020 ...

  • Page 2

    PARALLEL MODE (S=1) In the PARALLEL programming mode, the output of the DS1020 will reproduce the logic state of the input after a delay determined by the state of the eight program input pins P0 - P7. The parallel inputs ...

  • Page 3

    FUNCTIONAL BLOCK DIAGRAM Figure 1 SERIAL READOUT Figure ...

  • Page 4

    CASCADING MULTIPLE DEVICES (DAISY CHAIN) Figure 3 PART NUMBER TABLE Table 1 PART STEP ZERO NUMBER DELAY TIME DS1020-15 10 ± 2 DS1020-25 10 ± 2 DS1020-50 10 ± 2 DS1020-100 10 ± 2 DS1020-200 10 ± 3 DELAYS VS. ...

  • Page 5

    DALLAS SEMICONDUCTOR TEST CIRCUIT Figure 4 TEST SETUP DESCRIPTION Figure 4 illustrates the hardware configuration used for measuring the timing parameters of the DS1020. The input waveform is produced by a precision pulse generator under software control. Time delays are ...

  • Page 6

    ABSOLUTE MAXIMUM RATINGS* Voltage on any Pin Relative to Ground Operating Temperature Storage Temperature Soldering Temperature Short Circuit Output Current * This is a stress rating only and functional operation of the device at these or any other conditions above ...

  • Page 7

    PARAMETER SYMBOL Parallel Input Change to Delay Invalid Enable to Delay Valid Enable to Delay Invalid V Valid to Device CC Functional Input Pulse Width Input to Output Delay Input Period CAPACITANCE PARAMETER SYMBOL Input Capacitance TIMING DIAGRAM: SILICON ...

  • Page 8

    TERMINOLOGY Period: The time elapsed between the leading edge of the first pulse and the leading edge of the following pulse. (Pulse Width): The elapsed time on the pulse between the 1.5V point on the leading edge and the t ...

  • Page 9

    ... TIMING DIAGRAM: SERIAL MODE ( Figure 8 NOTES: 1. All voltages are referenced to ground and 25°C. Delay accurate on both rising and falling edges within tolerances given in CC Table 1. 3. Measured with output open. 4. The “Q” output will only source 4 mA. This pin is only intended to drive other DS1020s ...