M4T32-BR12SH1 STMicroelectronics, M4T32-BR12SH1 Datasheet - Page 11

• Manufacturer Part Number: M4T32-BR12SH1
• Description: IC SNAPHAT BATT/CRYSTAL 28-SOIC
• Manufacturer: STMicroelectronics

Specifications of M4T32-BR12SH1

• Battery Type: Li-(CF)
• Operating Supply Voltage: 0 V to 2.8 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Package / Case: SOIC-28
• Mounting Style: SMD/SMT
• Capacity: 120 mAh
• Chemical System: Lithium Poly-Carbonmonoflouride
• Primary Type: Pack
• Size: Cylindrical
• Standards: UL Recognized
• Temperature, Operating: 0 to +75 °C
• Temperature, Operating, Maximum: 70 °C
• Temperature, Operating, Minimum: 0 °C
• Termination: Snap-On
• Voltage, Battery: 3 V
• Voltage, Rating: 3 V
• Supply Voltage Range: 2.8V
• Battery Ic Case Style: SOIC
• No. Of Pins: 4
• Operating Temperature Range: 0°C To +70°C
• Crystal Terminals: Snap On
• Load Capacitance: 12.5pF
• Rohs Compliant: Yes
• Crystal Mounting Type: SMD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-3687-5

M48T35AV
2.3
Note:
Table 4.
1. Valid for ambient operating temperature: T
2. C
3. If E goes low simultaneously with W going low, the outputs remain in the high impedance state.
Data retention mode
With valid V
RAM. Should the supply voltage decay, the RAM will automatically power-fail deselect, write
protecting itself when V
Table
treated as “don't care.”
A power failure during a WRITE cycle may corrupt data at the currently addressed location,
but does not jeopardize the rest of the RAM's content. At voltages below V
user can be assured the memory will be in a write protected state, provided the V
is not less than t
into the deselect window during the time the device is sampling V
of the power supply lines is recommended.
When V
preserves data and powers the clock. The internal button cell will maintain data in the
M48T35AV for an accumulated period of at least 7 years when V
system power returns and V
supply is switched to external V
plus t
WRITE cycles prior to processor stabilization. Normal RAM operation can resume t
V
CC
t
t
WHQX
WLQZ
Symbol
L
exceeds V
t
t
t
t
t
rec
t
t
t
t
t
t
t
= 5 pF.
t
WLWH
WHDX
10, and
WHAX
DVWH
AVWH
AVWL
EHAX
DVEH
EHDX
ELEH
AVEH
AVAV
AVEL
CC
(min). E should be kept high as V
(2)(3)
(2)(3)
drops below V
CC
WRITE mode AC characteristics
Table 11 on page
applied, the M48T35AV operates as a conventional BYTEWIDE™ static
PFD
F
WRITE cycle time
Address valid to WRITE enable low
Address valid to chip enable low
WRITE enable pulse width
Chip enable low to chip enable high
WRITE enable high to address transition
Chip enable high to address transition
Input valid to WRITE enable high
Input valid to chip enable high
WRITE enable high to input transition
Chip enable high to input transition
WRITE enable low to output Hi-Z
Address valid to WRITE enable high
Address valid to chip enable high
WRITE enable high to output transition
. The M48T35AV may respond to transient noise spikes on V
(max).
CC
SO
falls within the V
, the control circuit switches power to the internal battery which
CC
Doc ID 6845 Rev 8
CC
rises above V
Parameter
21). All outputs become high impedance, and all inputs are
. Write protection continues until V
A
= 0 to 70 °C; V
(1)
CC
PFD
SO
rises past V
(max), V
, the battery is disconnected and the power
CC
= 3.0 to 3.6 V (except where noted).
PFD
PFD
(min) window (see
(min) to prevent inadvertent
Min
100
80
80
10
10
50
50
80
80
10
0
0
5
5
CC
CC
M48T35AV
. Therefore, decoupling
is less than V
CC
reaches V
Operation modes
Max
PFD
50
CC
(min), the
Figure
CC
that reach
SO
PFD
rec
fall time
. As
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(min)
13,
after
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