IC SNAPHAT BATT/CRYSTAL 28-SOIC

M4T32-BR12SH1

Manufacturer Part NumberM4T32-BR12SH1
DescriptionIC SNAPHAT BATT/CRYSTAL 28-SOIC
ManufacturerSTMicroelectronics
M4T32-BR12SH1 datasheets
MSDS Material Safety Datasheet
 

Specifications of M4T32-BR12SH1

Battery TypeLi-(CF)Operating Supply Voltage0 V to 2.8 V
Maximum Operating Temperature+ 70 CMinimum Operating Temperature0 C
Package / CaseSOIC-28Mounting StyleSMD/SMT
Capacity120 mAhChemical SystemLithium Poly-Carbonmonoflouride
Primary TypePackSizeCylindrical
StandardsUL RecognizedTemperature, Operating0 to +75 °C
Temperature, Operating, Maximum70 °CTemperature, Operating, Minimum0 °C
TerminationSnap-OnVoltage, Battery3 V
Voltage, Rating3 VSupply Voltage Range2.8V
Battery Ic Case StyleSOICNo. Of Pins4
Operating Temperature Range0°C To +70°CCrystal TerminalsSnap On
Load Capacitance12.5pFRohs CompliantYes
Crystal Mounting TypeSMDLead Free Status / RoHS StatusLead free / RoHS Compliant
Other names497-3687-5  
1
2
3
4
5
6
7
8
9
10
11
Page 11
12
Page 12
13
Page 13
14
Page 14
15
Page 15
16
Page 16
17
Page 17
18
Page 18
19
Page 19
20
Page 20
21
22
23
24
25
26
27
28
29
Page 11/29

Download datasheet (513Kb)Embed
PrevNext
M48T35AV
Table 4.
WRITE mode AC characteristics
Symbol
t
AVAV
t
AVWL
t
AVEL
t
WLWH
t
ELEH
t
WHAX
t
EHAX
t
DVWH
t
DVEH
t
WHDX
t
EHDX
(2)(3)
t
WLQZ
t
AVWH
t
AVEH
(2)(3)
t
WHQX
1. Valid for ambient operating temperature: T
2. C
= 5 pF.
L
3. If E goes low simultaneously with W going low, the outputs remain in the high impedance state.
2.3
Data retention mode
With valid V
applied, the M48T35AV operates as a conventional BYTEWIDE™ static
CC
RAM. Should the supply voltage decay, the RAM will automatically power-fail deselect, write
protecting itself when V
Table
10, and
Table 11 on page
treated as “don't care.”
Note:
A power failure during a WRITE cycle may corrupt data at the currently addressed location,
but does not jeopardize the rest of the RAM's content. At voltages below V
user can be assured the memory will be in a write protected state, provided the V
is not less than t
F
into the deselect window during the time the device is sampling V
of the power supply lines is recommended.
When V
drops below V
CC
preserves data and powers the clock. The internal button cell will maintain data in the
M48T35AV for an accumulated period of at least 7 years when V
system power returns and V
supply is switched to external V
plus t
(min). E should be kept high as V
rec
WRITE cycles prior to processor stabilization. Normal RAM operation can resume t
V
exceeds V
CC
PFD
(1)
Parameter
WRITE cycle time
Address valid to WRITE enable low
Address valid to chip enable low
WRITE enable pulse width
Chip enable low to chip enable high
WRITE enable high to address transition
Chip enable high to address transition
Input valid to WRITE enable high
Input valid to chip enable high
WRITE enable high to input transition
Chip enable high to input transition
WRITE enable low to output Hi-Z
Address valid to WRITE enable high
Address valid to chip enable high
WRITE enable high to output transition
= 0 to 70 °C; V
A
falls within the V
CC
PFD
21). All outputs become high impedance, and all inputs are
. The M48T35AV may respond to transient noise spikes on V
, the control circuit switches power to the internal battery which
SO
rises above V
CC
SO
. Write protection continues until V
CC
rises past V
CC
(max).
Doc ID 6845 Rev 8
Operation modes
M48T35AV
Min
Max
100
0
0
80
80
10
10
50
50
5
5
50
80
80
10
= 3.0 to 3.6 V (except where noted).
CC
(max), V
(min) window (see
PFD
PFD
. Therefore, decoupling
CC
is less than V
CC
, the battery is disconnected and the power
reaches V
CC
(min) to prevent inadvertent
PFD
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Figure
13,
(min), the
fall time
CC
that reach
CC
. As
SO
(min)
PFD
after
rec
11/29