M4T32-BR12SH6 STMicroelectronics, M4T32-BR12SH6 Datasheet - Page 14

IC SNAPHAT BATT/CRYSTAL 28-SOIC

M4T32-BR12SH6

Manufacturer Part Number
M4T32-BR12SH6
Description
IC SNAPHAT BATT/CRYSTAL 28-SOIC
Manufacturer
STMicroelectronics

Specifications of M4T32-BR12SH6

Battery Type
Li-(CF)
Operating Supply Voltage
0 V to 2.8 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Package / Case
SOIC-28
Mounting Style
SMD/SMT
Capacity
120 mAh
Chemical System
Lithium Poly-Carbonmonoflouride
Primary Type
Pack
Size
Cylindrical
Standards
UL Recognized
Temperature, Operating
-40 to +85 °C
Temperature, Operating, Maximum
85 °C
Temperature, Operating, Minimum
-40 °C
Termination
Snap-On
Voltage, Battery
3 V
Voltage, Rating
3 V
Supply Voltage Range
2.8V
Battery Ic Case Style
SOIC
No. Of Pins
4
Operating Temperature Range
-40°C To +85°C
Crystal Terminals
Snap On
Load Capacitance
12.5pF
Rohs Compliant
Yes
Crystal Mounting Type
SMD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-3688-5

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Clock operations
Note:
3.4
14/29
Table 5.
Keys:
When CEB is set to '1,' CB will toggle from '0' to '1' or from '1' to '0' at the turn of the century
(dependent upon the initial value set).
When CEB is set to '0,' CB will not toggle. The WRITE bit does not need to be set to write to
CEB.
Calibrating the clock
The M48T35AV is driven by a quartz-controlled oscillator with a nominal frequency of
32,768 Hz. The devices are tested not to exceed 35 ppm (parts per million) oscillator
frequency error at 25°C, which equates to about ±1.53 minutes per month. With the
calibration bits properly set, the accuracy of each M48T35AV improves to better than
+1/–2 ppm at 25°C.
The oscillation rate of any crystal changes with temperature (see
Most clock chips compensate for crystal frequency and temperature shift error with
cumbersome “trim” capacitors. The M48T35AV design, however, employs periodic counter
correction. The calibration circuit adds or subtracts counts from the oscillator divider circuit
at the divide by 256 stage, as shown in
are blanked (subtracted, negative calibration) or split (added, positive calibration) depends
upon the value loaded into the five calibration bits found in the control register. Adding
counts speeds the clock up, subtracting counts slows the clock down.
The calibration byte occupies the five lower order bits (D4-D0) in the control register 7FF8h.
These bits can be set to represent any value between 0 and 31 in binary form. Bit D5 is the
SIGN bit; '1' indicates positive calibration, '0' indicates negative calibration. Calibration
Address
7FFDh
7FFCh
7FFFh
7FFEh
7FFBh
7FFAh
7FF9h
7FF8h
S = SIGN bit
FT = FREQUENCY TEST bit (must be set to '0' upon power for normal operation)
R = READ bit
W = WRITE bit
ST = STOP bit
0 = Must be set to '0'
CEB = CENTURY ENABLE bit
CB = CENTURY bit
D7
ST
W
Register map
0
0
0
0
0
D6
FT
R
0
0
10 years
0
10 seconds
10 minutes
CEB
D5
S
0
10 hours
10 date
Doc ID 6845 Rev 8
10 M.
CB
D4
Data
D3
Figure 10 on page
0
Calibration
D2
Seconds
Minutes
Month
Hours
Date
Year
Day
D1
16. The number of times pulses
D0
Figure 9 on page
Century/day
Seconds
Minutes
Control
Month
Hours
Date
Year
Function/range
BCD format
00-01/01-07
M48T35AV
00-99
01-12
01-31
00-23
00-59
00-59
16).

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