ICM7555ID/01,112 NXP Semiconductors, ICM7555ID/01,112 Datasheet - Page 13

IC CMOS TIMER GEN PURPOSE 8SOIC

ICM7555ID/01,112

Manufacturer Part Number
ICM7555ID/01,112
Description
IC CMOS TIMER GEN PURPOSE 8SOIC
Manufacturer
NXP Semiconductors
Type
555 Type, Timer/Oscillator (Single)r
Datasheets

Specifications of ICM7555ID/01,112

Package / Case
8-SOIC (3.9mm Width)
Frequency
500kHz
Voltage - Supply
3 V ~ 16 V
Current - Supply
180µA
Operating Temperature
-40°C ~ 85°C
Number Of Internal Timers
1
Supply Voltage (max)
16 V
Supply Voltage (min)
3 V
Maximum Power Dissipation
780 mW
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Count
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-5022
935274819112
ICM7555ID/01
ICM7555ID/01,112
ICM7555ID/01

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ICM7555ID/01,112
Manufacturer:
INTERSIL
Quantity:
9 200
NXP Semiconductors
ICM7555_2
Product data sheet
11.6 Control voltage
11.7 RESET
The CONTROL_VOLTAGE terminal permits the two trip voltages for the THRESHOLD
and TRIGGER internal comparators to be controlled. This provides the possibility of
oscillation frequency modulation in the astable mode, or even inhibition of oscillation,
depending on the applied voltage. In the monostable mode, delay times can be changed
by varying the applied voltage to the CONTROL_VOLTAGE pin.
The RESET terminal is designed to have essentially the same trip voltage as the standard
NE/SE555 device, i.e., 0.6 V to 0.7 V. At all supply voltages it represents an extremely
high input impedance. The mode of operation of the RESET function is, however, much
improved over the standard NE/SE555 device in that it controls only the internal flip-flop,
which in turn controls simultaneously the state of the OUTPUT and DISCHARGE pins.
This avoids the multiple threshold problems sometimes encountered with slow falling
edges in the NE/SE555 devices.
Fig 16. Monostable operation
V
DD
18 V; t = 1.05 R
Rev. 02 — 3 August 2009
A
1
2
3
4
C
GND
TRIGGER
OUTPUT
RESET
CONTROL_VOLTAGE
THRESHOLD
DISCHARGE
V
DD
8
7
6
5
V
General purpose CMOS timer
DD
optional
capacitor
R A
002aae419
© NXP B.V. 2009. All rights reserved.
ICM7555
C
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