CP82C54Z Intersil, CP82C54Z Datasheet - Page 9

IC TIMER PROG CMOS 8MHZ 24-PDIP

CP82C54Z

Manufacturer Part Number
CP82C54Z
Description
IC TIMER PROG CMOS 8MHZ 24-PDIP
Manufacturer
Intersil
Type
Programmable Timerr
Datasheet

Specifications of CP82C54Z

Frequency
8MHz
Voltage - Supply
4.5 V ~ 5.5 V
Current - Supply
10mA
Operating Temperature
0°C ~ 70°C
Package / Case
24-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Count
-
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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NOTE: In all four examples, all counters are programmed to
Read/Write two-byte counts. These are only four of many
programming sequences.
A new initial count may be written to a Counter at any time
without affecting the Counter’s programmed Mode in any way.
Counting will be affected as described in the Mode definitions.
The new count must follow the programmed count format.
If a Counter is programmed to read/write two-byte counts,
the following precaution applies. A program must not transfer
control between writing the first and second byte to another
routine which also writes into that same Counter. Otherwise,
the Counter will be loaded with an incorrect count.
READ OPERATIONS
It is often desirable to read the value of a Counter without
disturbing the count in progress. This is easily done in the
82C54.
There are three possible methods for reading the Counters.
The first is through the Read-Back command, which is
explained later. The second is a simple read operation of the
Counter, which is selected with the A1, A0 inputs. The only
requirement is that the CLK input of the selected Counter
must be inhibited by using either the GATE input or external
logic. Otherwise, the count may be in process of changing
when it is read, giving an undefined result.
COUNTER LATCH COMMAND
The other method for reading the Counters involves a
special software command called the “Counter Latch
Command”. Like a Control Word, this command is written to
the Control Word Register, which is selected when A1, A0 =
11. Also, like a Control Word, the SC0, SC1 bits select one of
the three Counters, but two other bits, D5 and D4,
distinguish this command from a Control Word.
.
A1, A0 = 11; CS = 0; RD = 1; WR = 0
Control Word - Counter 1
Control Word - Counter 0
LSB of Count - Counter 1
Control Word - Counter 2
LSB of Count - Counter 0
MSB of Count - Counter 1
LSB of Count - Counter 2
MSB of Count - Counter 0
MSB of Count - Counter 2
SC1
D7
SC0
D6
POSSIBLE PROGRAMMING SEQUENCE
D5
0
D4
0
9
D3
X
D2
X
A1
1
1
0
1
0
0
1
0
1
D1
X
A0
1
1
1
1
0
1
0
0
0
D0
X
82C54
SC1, SC0 - specify counter to be latched
The selected Counter’s output latch (OL) latches the count
when the Counter Latch Command is received. This count is
held in the latch until it is read by the CPU (or until the Counter
is reprogrammed). The count is then unlatched automatically
and the OL returns to “following” the counting element (CE).
This allows reading the contents of the Counters “on the fly”
without affecting counting in progress. Multiple Counter Latch
Commands may be used to latch more than one Counter.
Each latched Counter’s OL holds its count until read. Counter
Latch Commands do not affect the programmed Mode of the
Counter in any way.
If a Counter is latched and then, some time later, latched
again before the count is read, the second Counter Latch
Command is ignored. The count read will be the count at the
time the first Counter Latch Command was issued.
With either method, the count must be read according to the
programmed format; specifically, if the Counter is
programmed for two byte counts, two bytes must be read.
The two bytes do not have to be read one right after the
other; read or write or programming operations of other
Counters may be inserted between them.
Another feature of the 82C54 is that reads and writes of the
same Counter may be interleaved; for example, if the
Counter is programmed for two byte counts, the following
sequence is valid.
If a counter is programmed to read or write two-byte counts,
the following precaution applies: A program MUST NOT
transfer control between reading the first and second byte to
another routine which also reads from that same Counter.
Otherwise, an incorrect count will be read.
READ-BACK COMMAND
The read-back command allows the user to check the count
value, programmed Mode, and current state of the OUT pin
and Null Count flag of the selected counter(s).
The command is written into the Control Word Register and
has the format shown in Figure 5. The command applies to
D5, D4 - 00 designates Counter Latch Command, X - Don’t Care.
NOTE: Don’t Care bits (X) should be 0 to insure compatibility
with future products.
1. Read least significant byte.
2. Write new least significant byte.
3. Read most significant byte.
4. Write new most significant byte.
SC1
0
0
1
1
SC0
0
1
0
1
Read-Back Command
COUNTER
0
1
2

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