IC TIMER PROG CMOS 10MHZ 24-DIP

CP82C54-10

Manufacturer Part NumberCP82C54-10
DescriptionIC TIMER PROG CMOS 10MHZ 24-DIP
ManufacturerIntersil
TypeProgrammable Timer
CP82C54-10 datasheet
 

Specifications of CP82C54-10

Frequency10MHzVoltage - Supply4.5 V ~ 5.5 V
Current - Supply10mAOperating Temperature0°C ~ 70°C
Package / Case24-DIP (0.600", 15.24mm)Lead Free Status / RoHS StatusContains lead / RoHS non-compliant
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Data Sheet
CMOS Programmable Intervel Timer
The Intersil 82C54 is a high performance CMOS
Programmable Interval Timer manufactured using an
advanced 2 micron CMOS process.
The 82C54 has three independently programmable and
functional 16-bit counters, each capable of handling clock
input frequencies of up to 8MHz (82C54) or 10MHz
(82C54-10) or 12MHz (82C54-12).
The high speed and industry standard configuration of the
82C54 make it compatible with the Intersil 80C86, 80C88,
and 80C286 CMOS microprocessors along with many
other industry standard processors. Six programmable
timer modes allow the 82C54 to be used as an event
counter, elapsed time indicator, programmable one-shot,
and many other applications. Static CMOS circuit design
insures low power operation.
The Intersil advanced CMOS process results in a significant
reduction in power with performance equal to or greater than
existing equivalent products.
Pinouts
82C54 (PDIP, CERDIP)
TOP VIEW
D7
1
24
D6
2
23
22
D5
3
D4
4
21
20
D3
5
D2
6
19
D1
7
18
17
D0
8
CLK 0
9
16
OUT 0
10
15
GATE 0
11
14
GND
12
13
1
July 11, 2005
Features
• 8MHz to 12MHz Clock Input Frequency
• Compatible with NMOS 8254
- Enhanced Version of NMOS 8253
• Three Independent 16-Bit Counters
• Six Programmable Counter Modes
• Status Read Back Command
• Binary or BCD Counting
• Fully TTL Compatible
• Single 5V Power Supply
• Low Power
- ICCSB. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10µA
- ICCOP . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA at 8MHz
• Operating Temperature Ranges
- CX82C54 . . . . . . . . . . . . . . . . . . . . . . . . . 0
- IX82C54 . . . . . . . . . . . . . . . . . . . . . . . . -40
- MD82C54 . . . . . . . . . . . . . . . . . . . . . . -55
• Pb-Free Plus Anneal Available (RoHS Compliant)
VCC
WR
RD
CS
A1
A0
CLK 2
OUT 2
CLK 0
GATE 2
CLK 1
GATE 1
OUT 1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
|
1-888-INTERSIL or 1-888-468-3774
All other trademarks mentioned are the property of their respective owners.
82C54
FN2970.4
o
C to +70
o
C to +85
o
C to +125
82C54 (PLCC/CLCC)
TOP VIEW
4
3
2
1
28
27
26
D4
5
25
NC
D3
6
24
CS
D2
7
23
A1
D1
8
22
A0
D0
9
21
CLK2
10
20
OUT 2
11
NC
19
GATE 2
12 13 14 15 16 17 18
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003, 2005. All Rights Reserved.
o
C
o
C
o
C

CP82C54-10 Summary of contents

  • Page 1

    ... All other trademarks mentioned are the property of their respective owners. 82C54 FN2970 + + +125 82C54 (PLCC/CLCC) TOP VIEW CLK2 10 20 OUT GATE Intersil (and design registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2003, 2005. All Rights Reserved ...

  • Page 2

    ... Ordering Information PART NUMBERS 8MHz 10MHz CP82C54 CP82C54-10 CP82C54Z (See Note) CP82C54-10Z (See Note) CP82C54-12Z (See Note) CS82C54* CS82C54-10* CS82C54Z* (See Note) CS82C54-10Z* (See Note) CS82C54-12Z* (See Note) ID82C54 - IP82C54 IP82C54-10 IP82C54Z (See Note) IP82C54-10Z (See Note) IS82C54* IS82C54-10* IS82C54Z (See Note) ...

  • Page 3

    Absolute Maximum Ratings Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

  • Page 4

    AC Electrical Specifications V CC SYMBOL PARAMETER READ CYCLE (1) TAR Address Stable Before RD (2) TSR CS Stable Before RD (3) TRA Address Hold Time After RD (4) TRR RD Pulse Width (5) TRD Data Delay from RD (6) ...

  • Page 5

    Functional Diagram DATA/ BUS BUFFER RD READ/ WR WRITE LOGIC CONTROL WORD REGISTER Pin Description DIP PIN SYMBOL NUMBER TYPE I/O CLK 0 ...

  • Page 6

    Functional Description General The 82C54 is a programmable interval timer/counter designed for use with microcomputer systems general purpose, multi-timing element that can be treated as an array of I/O ports in the system software. The 82C54 solves ...

  • Page 7

    The status register, shown in the figure, when latched, contains the current contents of the Control Word Register and status of the output and null count flag. (See detailed explanation of the Read-Back command.) The actual counter is labeled CE ...

  • Page 8

    Since the Control Word Register and the three Counters have separate addresses (selected by the A1, A0 inputs), and each Control Word specifies the Counter it applies to (SC0, SC1 bits), no special instruction sequence is required. Any programming sequence ...

  • Page 9

    POSSIBLE PROGRAMMING SEQUENCE Control Word - Counter 1 Control Word - Counter 0 LSB of Count - Counter 1 Control Word - Counter 2 LSB of Count - Counter 0 MSB of Count - Counter 1 LSB of Count - ...

  • Page 10

    D3 COUNT STATUS CNT 2 CNT 1 CNT ...

  • Page 11

    COMMANDS ...

  • Page 12

    If an initial count is written while GATE = 0, it will still be loaded on the next CLK pulse. When GATE goes high, OUT will go high N CLK pulses later; no CLK pulse is needed to load the ...

  • Page 13

    MODE 2: RATE GENERATOR This Mode functions like a divide-by-N counter typically used to generate a Real Time Clock Interrupt. OUT will initially be high. When the initial count has decremented to 1, OUT goes low for one ...

  • Page 14

    Mode 3 Is Implemented As Follows EVEN COUNTS - OUT is initially high. The initial count is loaded on one CLK pulse and then is decremented by two on succeeding CLK pulses. When the count expires, OUT changes value and ...

  • Page 15

    Counter will be loaded with new count on the next CLK pulse and counting will continue from there LSB = 3 WR CLK GATE OUT ...

  • Page 16

    Timing Waveforms DATA BUS DATA BUS RD 82C54 (9) tWA (11) tAW (10) tSW VALID (13) tWD (14) tDW (12) tWW FIGURE 17. WRITE tRA (3) tAR (1) ...

  • Page 17

    Timing Waveforms (Continued) MODE WR CLK GATE OUT Burn-In Circuits MD82C54 (CERDIP VCC GND F10 6 ...

  • Page 18

    Die Characteristics DIE DIMENSIONS: 129mils x 155mils x 19mils (3270µm x 3940µm x 483µm) Metallization Mask Layout CLK0 18 82C54 METALLIZATION: Type: Si-Al-Cu Thickness: Metal 1: 8kÅ ± 0.75kÅ Metal 2: 12kÅ ± 1.0kÅ GLASSIVATION: ...

  • Page 19

    Dual-In-Line Plastic Packages (PDIP INDEX N/2 AREA -B- -A- D BASE PLANE -C- SEATING PLANE 0.010 (0.25 NOTES: 1. Controlling Dimensions: INCH. In case of conflict between ...

  • Page 20

    Plastic Leaded Chip Carrier Packages (PLCC) 0.042 (1.07) 0.042 (1.07) 0.048 (1.22) 0.056 (1.42) PIN (1) IDENTIFIER 0.050 (1.27 0.020 (0.51) MAX 3 PLCS 0.026 (0.66) 0.032 (0.81) 0.045 (1.14) MIN VIEW “A” ...

  • Page 21

    Ceramic Leadless Chip Carrier Packages (CLCC) 0.010 -E- 0.007 -H- - ...

  • Page 22

    ... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...