S-35390A-T8T1G Seiko Instruments, S-35390A-T8T1G Datasheet - Page 29

IC RTC I2C 2-WIRE 8-TSSOP

S-35390A-T8T1G

Manufacturer Part Number
S-35390A-T8T1G
Description
IC RTC I2C 2-WIRE 8-TSSOP
Manufacturer
Seiko Instruments
Type
Clock/Calendarr
Datasheet

Specifications of S-35390A-T8T1G

Time Format
HH:MM:SS (12/24 hr)
Date Format
YY-MM-DD-dd
Interface
I²C, 2-Wire Serial
Voltage - Supply
1.3 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-TSSOP
Function
Clock/Calendar/Alarm/Battery Backup/Interrupt
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.3 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Rtc Bus Interface
Serial (2-Wire, I2C)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
728-1007-2

Available stocks

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Rev.3.0
Serial Interface
The S-35390A receives various commands via I
follows.
1. Start condition
2. Stop condition
3. Data transfer and acknowledgment signal
SDA
SCL
Data transmission is performed for every 1-byte, after detecting a start condition. Transmit data while the SCL line is in
“L”, and be careful of spec of t
line is in “H”, the data will be recognized as start/stop condition in spite of data transmission. Note that by this case, the
access will be interrupted.
A start condition is when the SDA line changes “H” to “L” when the SCL line is in “H”, so that the access starts.
A stop condition is when the SDA line changes “L” to “H” when the SCL line is in “H”, and the access stops, so that the
S-35390A gets standby.
During data transmission, every moment receiving 1-byte data, the devices which work for receiving data send an
acknowledgment signal back. For example, as seen in Figure 33, in case that the S-35390A is the device working for
receiving data and the master device is the one working for sending data; when the 8th clock pulse falls, the master
device releases the SDA line. After that, the S-35390A sends an acknowledgment signal back, and set the SDA line to
“L” at the 9th clock pulse. The S-35390A does not output an acknowledgment signal is that the access is not being
done regularly.
(Input from
master device)
S-35390A)
(Input from
S-35390A)
(Output from
_00
SDA
SCL
SDA
t
SU.STA
Start condition
Start condition
t
HD.STA
Figure 33 Output Timing of Acknowledgment Signal
SU.DAT
t
SU.DAT
and t
Figure 32 Start/Stop Conditions
1
HD. DAT
Seiko Instruments Inc.
2
C-bus serial interface to Read/Write data. Regarding transmission is as
t
HD.DAT
when changing the SDA line. If the SDA line changes while the SCL
High-Z
2-WIRE REAL-TIME CLOCK
8
t
PD
Output acknowledgment
t
SU.STO
Stop condition
SDA is released
High-Z
(“L” active)
9
S-35390A
29

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