DS14285SN Maxim Integrated Products, DS14285SN Datasheet

IC RTC W/NV RAM CNTRL IND 24SOIC

DS14285SN

Manufacturer Part Number
DS14285SN
Description
IC RTC W/NV RAM CNTRL IND 24SOIC
Manufacturer
Maxim Integrated Products
Type
Clock/Calendar/NVSRAMr
Datasheet

Specifications of DS14285SN

Memory Size
114B
Time Format
HH:MM:SS (12/24 hr)
Date Format
YY-MM-DD-dd
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
www.maxim-ic.com
FEATURES
Direct Replacement for IBM AT
Computer Clock/Calendar
Functionally Compatible with the
DS1285/DS1287
Available as Chip (DS14285, DS14285S, or
DS14285Q) or Stand-Alone Module with
Embedded Lithium Battery and Crystal
(DS14287)
Automatic Backup Supply and Write
Protection to Make External SRAM
Nonvolatile
Counts Seconds, Minutes, Hours, Days,
Day of the Week, Date, Month, and Year
with Leap Year Compensation Valid Up
to 2100
Binary or BCD Representation of Time,
Calendar, and Alarm
12- or 24-Hour Clock with AM and PM in
12-Hour Mode
Daylight Saving Time Option
Multiplex Bus for Pin Efficiency
Interfaced with Software as 128 RAM
Locations
14 Bytes of Clock and Control Registers
114 Bytes of General Purpose RAM
Programmable Square-Wave Output
Signal
Bus-Compatible Interrupt Signals (IRQ)
Three Interrupts are Separately Software-
Maskable and Testable
Time-of-Day Alarm Once/Second to
Periodic Rates from 122µs to 500ms
End of Clock Update Cycle
Optional Industrial Temperature Version
Available: DS14285 DIP, SO, and PLCC
Once/Day
1 of 26
Real-Time Clock with NV RAM
PIN CONFIGURATIONS
TOP VIEW
AD4
N.C.
AD0
AD1
AD2
AD3
AD5
GND
N.C.
N.C.
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
V
V
GND
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
CCO
CCO
X1
X2
Encapsulated Package
DS14285/DS14287
5
6
7
8
9
10
11
12
1
2
3
4
5
6
7
8
9
10
11
12
4
1
2
3
4
5
6
7
8
9
10
11
12
13 14
DS14285
3
DIP/SO
Control Control
DS14287
PLCC
2
15
1
16
28
24
23
22
21
20
19
18
17
16
15
14
13
17
27
18
26
24
23
22
21
20
19
18
17
16
15
14
13
25
24
23
22
21
20
19
RESET
CEO
V
SQW
CEI
IRQ
DS
GND
R/W
AS
CS
V
CC
BAT
CEI
V
IRQ
RESET
DS
GND
R/W
V
SQW
CEO
CEI
N.C.
IRQ
RESET
DS
N.C.
R/W
AS
CS
BAT
CC
REV: 112105

Related parts for DS14285SN

DS14285SN Summary of contents

Page 1

FEATURES Direct Replacement for IBM AT Computer Clock/Calendar Functionally Compatible with the DS1285/DS1287 Available as Chip (DS14285, DS14285S, or DS14285Q) or Stand-Alone Module with Embedded Lithium Battery and Crystal (DS14287) Automatic Backup Supply and Write Protection to Make External ...

Page 2

... SO (0.300″)/Tape & Reel 5 (0.300″)/Tape & Reel 5 (0.300″)/Tape & Reel 5.0 24 EDIP (0.740″) 5.0 24 EDIP (0.740″ TOP MARK* DS14285 DS14285 DS14285N DS14285N DS14285Q DS14285Q DS14285QN DS14285QN DS14285S DS14285S DS14285SN DS14285SN DS14285SN DS14285SN DS14285S DS14285S DS14287 DS14287 ...

Page 3

DETAILED DESCRIPTION The DS14285/DS14287 Real Time Clock with NVRAM Control provides the industry standard DS1287 clock function with the additional feature of providing nonvolatile control for an external SRAM. Functions include a nonvolatile time-of-day clock, alarm, 100-year calendar, programmable interrupt, ...

Page 4

MOT (Mode Select) - The MOT pin offers the flexibility to choose between to bus types. When connected Motorola bus timing is selected. When connected to GND or left disconnected, Intel CC bus timing is selected. The ...

Page 5

Input) - The RESET RESET pin can be held low for a time in order to allow the power supply to stabilize. The amount of time RESET that is held low is dependent on the application. However, if RESET ...

Page 6

The battery should be connected directly to the V battery to the VBAT pin. Furthermore, a diode is not necessary because reverse charging current protection circuitry is provided internal to the device and has passed the requirements of Underwriters Laboratories ...

Page 7

POWER-DOWN/POWER-UP CONSIDERATIONS The real time clock function will continue to operate and all of the RAM, time, calendar, and alarm memory locations remain nonvolatile regardless of the level of the V DS14285/DS14287 and reaches a level of greater than 4.25 ...

Page 8

RTC ADDRESS MAP The address map of the DS14285/DS14287 is shown in Figure 2. The address map consists of 114 bytes of user RAM, 10 bytes of RAM that contain the RTC time, calendar, and alarm data, and 4 bytes ...

Page 9

When the 12-hour format is selected, the high order bit of the hours byte represents PM when logic one. The time, calendar, and alarm bytes are always ...

Page 10

CONTROL REGISTERS The DS14285/DS14287 has four control registers that are accessible at all times, even during the update cycle. REGISTER A MSB BIT 7 BIT 6 UIP DV2 UIP - The Update In Progress (UIP) bit is a status flag ...

Page 11

REGISTER B MSB BIT 7 BIT 6 SET PIE SET - When the SET bit the update transfer functions normally by advancing the counts once per second. When the SET bit is written any ...

Page 12

REGISTER C MSB BIT 7 BIT 6 IRQF PF IRQF - The Interrupt Request Flag (IRQF) bit is set when one or more of the following are true PIE = AIE = ...

Page 13

NONVOLATILE RAM The 114 general-purpose nonvolatile RAM bytes are not dedicated to any special function within the DS14285/DS14287. They can be used by the processor program as nonvolatile memory and are fully available during the update cycle. The DS14285/DS14287 can ...

Page 14

Register C is read. Double latching is included with Register C so that bits which are set remain stable throughout the read cycle. All bits which are set (high) are cleared when ...

Page 15

Table 2. Periodic Interrupt Rate and Square-Wave Output Frequency SELECT BITS REGISTER A RS3 RS2 RS1 ...

Page 16

Figure 4. Update-Ended and Periodic Interrupt Relationship ...

Page 17

ABSOLUTE MAXIMUM RATINGS Voltage Range on Any Pin Relative to Ground……………………………………………..-0.5V to +7.0V Storage Temperature Range………………………………………………………………...-40°C to +85°C Soldering Temperature: DIP…………………………………………..260°C for 10 seconds (See Note 12) Soldering Temperature: Surface Mount:…………………………….See IPC/JEDEC Standard J-STD-020 This is a stress rating only ...

Page 18

AC ELECTRICAL CHARACTERISTICS (Over the operating range) PARAMETER Cycle Pulse Width, DS/E Low or RD/ High Pulse Width, DS/E Low or RD/ Low Input Rise and Fall Time R/ Hold Time W R/ Setup Time Before DS/E W Chip Select ...

Page 19

Figure 5. Output Load DS14285 BUS TIMING FOR MOTOROLA INTERFACE ...

Page 20

DS14285/DS14287 BUS TIMING FOR INTEL INTERFACE WRITE CYCLE ...

Page 21

DS14285/DS14287 BUS TIMING FOR INTEL INTERFACE READ CYCLE DS14285/DS14287 IRQ RELEASE DELAY TIMING ...

Page 22

POWER-DOWN/POWER-UP TIMING POWER-DOWN/POWER-UP TIMING PARAMETER at V before Power-Down slew from 4. slew from after Power- Chip-Enable Propagation Delay to External ...

Page 23

NOTES: 1) All voltages are referenced to ground. 2) All outputs are open. 3) The MOT pin has an internal pulldown of 20kΩ. 4) The pin has an internal pullup of 50kΩ. CEI 5) Applies to the AD0–AD7 pins, the ...

Page 24

PACKAGE INFORMATION (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information www.maxim-ic.com/DallasPackInfo.) DS14285 24-PIN DIP DS14285 24-PIN SO PKG 24-PIN DIM MIN MAX A IN. 1.245 1.270 ...

Page 25

PACKAGE INFORMATION (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information www.maxim-ic.com/DallasPackInfo.) DS14285Q 28-PIN PLCC PKG DIM ...

Page 26

... No circuit patent licenses are implied. Maxim/Dallas Semiconductor reserves the right to change the circuitry and specifications without notice at any time The Maxim logo is a registered trademark of Maxim Integrated Products, Inc. The Dallas logo is a registered trademark of Dallas Semiconductor Corporation. NOTE: PINS 2, 3, 16, AND 20 ARE MISSING BY DESIGN. ...

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