AD7829BRUZ Analog Devices Inc, AD7829BRUZ Datasheet
AD7829BRUZ
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AD7829BRUZ Summary of contents
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FEATURES 8-bit half-flash ADC with 420 ns conversion time One, four, and eight single-ended analog input channels Available with input offset adjust On-chip track-and-hold SNR performance given for input frequencies MHz On-chip reference (2.5 V) Automatic power-down ...
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AD7822/AD7825/AD7829 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Product Highlights ....................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Timing Characteristics ................................................................ 5 Timing Diagram ........................................................................... 5 Absolute Maximum Ratings............................................................ 6 ...
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SPECIFICATIONS ± 10 ± 10%, GND = Table 1. Parameter DYNAMIC PERFORMANCE 1 Signal to (Noise + Distortion) Ratio 1 Total Harmonic Distortion 1 Peak Harmonic or ...
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AD7822/AD7825/AD7829 Parameter LOGIC OUTPUTS Output High Voltage Output Low Voltage High Impedance Leakage Current High Impedance Capacitance CONVERSION RATE Track-and-Hold Acquisition Time Conversion Time POWER SUPPLY REJECTION V ± 10% DD POWER REQUIREMENTS ...
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TIMING CHARACTERISTICS V = 2.5 V. All specifications −40°C to +85°C, unless otherwise noted. REF IN/OUT Table 2. 1, Parameter ± 10 ± 10% t 420 420 ...
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AD7822/AD7825/AD7829 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 3. Parameter V to AGND DGND DD Analog Input Voltage to AGND IN1 IN8 Reference Input Voltage to AGND V Input Voltage ...
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PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS DB2 DB3 1 20 DB1 2 DB4 19 DB0 DB5 3 18 CONVST DB6 4 17 AD7822 CS DB7 5 16 TOP VIEW RD AGND 6 15 (Not to Scale) DGND ...
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AD7822/AD7825/AD7829 TERMINOLOGY Signal-to-(Noise + Distortion) Ratio The measured ratio of signal-to-(noise + distortion) at the output of the analog-to-digital converter. The signal is the rms amplitude of the fundamental. Noise is the rms sum of all nonfundamental signals up to ...
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Gain Error The deviation of the last code transition (1111 . . . 110) to (1111 . . . 111) from the ideal, that is, V REF offset error has been adjusted out. Gain Error Match The difference in gain ...
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AD7822/AD7825/AD7829 CIRCUIT INFORMATION CIRCUIT DESCRIPTION The AD7822/AD7825/AD7829 consist of a track-and-hold amplifier followed by a half-flash analog-to-digital converter. These devices use a half-flash conversion technique where one 4-bit flash ADC is used to achieve an 8-bit result. The 4-bit flash ...
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A suggestion is to tie CONVST DGND through a pull- pull-down resistor. A rising edge on the CONVST pin causes the AD7829 to fully power up, while a rising edge on the PD pin causes ...
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AD7822/AD7825/AD7829 2.5V MID N/C (1.25V) MID MID V = 1.5V MID V = N/C (1V) 1V MID Figure ...
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Capacitor C2 in Figure 15 is typically about 4 pF and can be primarily attributed to pin capacitance. The resistor, R1 lumped component made up of the on resistance of several components, including that of the multiplexer and ...
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AD7822/AD7825/AD7829 INPUT FREQUENCY (MHz) Figure 18. SNR vs. Input Frequency on the AD7825 POWER-UP TIMES The AD7822/AD7825/AD7829 have a 1 μs power-up time when using an ...
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EXTERNAL REFERENCE POWER-UP 1µs CONVST CONVERSION INITIATED HERE ON-CHIP REFERENCE POWER-UP 25µs CONVST CONVERSION INITIATED HERE Figure 20. AD7822/AD7825 Power-Up Time POWER VS. THROUGHPUT Superior power performance can be achieved by using ...
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AD7822/AD7825/AD7829 Mode 2 Operation (Automatic Power-Down) When the AD7822/AD7825/AD7829 are operated in Mode 2 (see Figure 25), they automatically power down at the end of a conversion. The CONVST signal is brought low to initiate a conversion and is left ...
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PARALLEL INTERFACE The parallel interface of the AD7822/AD7825/AD7829 is eight bits wide. Figure 26 shows a timing diagram illustrating the operational sequence of the AD7822/AD7825/AD7829 parallel interface. The multiplexer address is latched into the AD7822/ AD7825/AD7829 on the falling edge ...
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AD7822/AD7825/AD7829 MICROPROCESSOR INTERFACING The parallel port on the AD7822/AD7825/AD7829 allows the ADCs to be interfaced to a range of many different micro- controllers. This section explains how to interface the AD7822/ AD7825/AD7829 with some of the more common microcontroller parallel ...
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AD7822 STANDALONE OPERATION The AD7822, being the single channel device, does not have any multiplexer addressing associated with it and can be controlled with just one signal, that is, the CONVST signal. As shown in Figure 31, the RD and ...
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AD7822/AD7825/AD7829 OUTLINE DIMENSIONS PIN 1 0.210 (5.33) MAX 0.150 (3.81) 0.130 (3.30) 0.115 (2.92) 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) 0.30 (0.0118) 0.10 (0.0039) COPLANARITY 0.10 1.060 (26.92) 1.030 (26.16) 0.980 (24.89 0.280 (7.11) 0.250 (6.35) 1 0.240 ...
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PIN 1 0.65 BSC 1.20 MAX 0.15 0.05 0.30 COPLANARITY 0.19 SEATING 0.10 PLANE COMPLIANT TO JEDEC STANDARDS MO-153-AC Figure 34. 20-Lead Thin Shrink Small Outline Package [TSSOP] (RU-20) Dimensions shown in millimeters ...
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AD7822/AD7825/AD7829 0.30 (0.0118) 0.10 (0.0039) COPLANARITY 0.10 0.15 0.05 15.60 (0.6142) 15.20 (0.5984 7.60 (0.2992) 7.40 (0.2913) 1 10.65 (0.4193) 12 10.00 (0.3937) 2.65 (0.1043) 2.35 (0.0925) SEATING 0.51 (0.0201) 1.27 (0.0500) 0.33 (0.0130) PLANE BSC 0.31 (0.0122) ...
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PIN 1 0.100 (2.54) BSC 0.250 (6.35) MAX 0.200 (5.08) 0.115 (2.92) 0.022 (0.56) 0.014 (0.36) 0.070 (1.78) 0.030 (0.76) COMPLIANT TO JEDEC STANDARDS MS-011-AB CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ...
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AD7822/AD7825/AD7829 PIN 1 0.15 0.05 COPLANARITY 9.80 9.70 9. 4.50 4.40 4. 0.65 BSC 1.20 MAX 0.30 0.20 SEATING 0.19 0.09 PLANE 0.10 COMPLIANT TO JEDEC STANDARDS MO-153-AE Figure 40. 28-Lead Thin Shrink ...
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... AD7829BRU-REEL −40°C to +85°C AD7829BRU-REEL7 −40°C to +85°C 1 AD7829BRUZ −40°C to +85°C 1 AD7829BRUZ-REEL −40°C to +85°C 1 AD7829BRUZ-REEL7 −40°C to +85° Pb-free part. AD7822/AD7825/AD7829 Package Description Package Option 20-Lead PDIP N-20 20-Lead PDIP N-20 20-Lead SOIC_W ...
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AD7822/AD7825/AD7829 NOTES Rev Page ...
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NOTES AD7822/AD7825/AD7829 Rev Page ...
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AD7822/AD7825/AD7829 NOTES ©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C01321-0-8/06(C) Rev Page ...