AD7674ASTZ Analog Devices Inc, AD7674ASTZ Datasheet

IC ADC 18BIT 800KSPS 48-LQFP

AD7674ASTZ

Manufacturer Part Number
AD7674ASTZ
Description
IC ADC 18BIT 800KSPS 48-LQFP
Manufacturer
Analog Devices Inc
Series
PulSAR®r
Datasheet

Specifications of AD7674ASTZ

Data Interface
Serial, Parallel
Number Of Bits
18
Sampling Rate (per Second)
800k
Number Of Converters
1
Power Dissipation (max)
138mW
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-LQFP
Resolution (bits)
18bit
Sampling Rate
800kSPS
Input Channel Type
Differential
Supply Voltage Range - Analog
4.75V To 5.25V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-AD7674CBZ - BOARD EVALUATION FOR AD7674
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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AD7674ASTZ
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ADI
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Part Number:
AD7674ASTZ
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Analog Devices Inc
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Part Number:
AD7674ASTZRL
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Quantity:
10 000
FEATURES
18-bit resolution with no missing codes
No pipeline delay (SAR architecture)
Differential input range: ±V
Throughput:
INL: ±2.5 LSB max (±9.5 ppm of full scale)
Dynamic range : 103 dB typ (V
S/(N+D): 100 dB typ @ 2 kHz (V
Parallel (18-,16-, or 8-bit bus) and serial 5 V/3 V interface
SPI®/QSPI™/MICROWIRE™/DSP compatible
On-board reference buffer
Single 5 V supply operation
Power dissipation:
48-lead LQFP or 48-lead LFCSP package
Pin-to-pin compatible upgrade of AD7676/AD7678/AD7679
APPLICATIONS
CT scanners
High dynamic data acquisition
Geophone and hydrophone sensors
Σ
Instrumentation
Spectrum analysis
Medical instruments
GENERAL DESCRIPTION
The AD7674 is an 18-bit, 800 kSPS, charge redistribution SAR,
fully differential analog-to-digital converter that operates on a
single 5 V power supply. The part contains a high speed 18-bit
sampling ADC, an internal conversion clock, an internal
reference buffer, error correction circuits, and both serial and
parallel system interface ports.
The part is available in 48-lead LQFP or 48-lead LFCSP
packages with operation specified from –40°C to +85°C.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
-
Δ replacement (low power, multichannel)
666 kSPS (Normal mode)
570 kSPS (Impulse mode)
78 mW typ@ 500 kSPS (Impulse mode)
160 μW @ 1 kSPS (Impulse mode)
800 kSPS (Warp mode)
98 mW typ @ 800 kSPS
REF
REF
(V
REF
REF
= 5 V)
= 5 V)
up to 5 V)
18-Bit, 2.5 LSB INL, 800 kSPS SAR ADC
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
FUNCTIONAL BLOCK DIAGRAM
Table 1. PulSAR
Type/kSPS
Pseudo-
Differential
True Bipolar
True
Differential
18-Bit
Multichannel/
Simultaneous
PRODUCT HIGHLIGHTS
1.
2.
3.
REFBUFIN
RESET
AGND
AVDD
High Resolution, Fast Throughput.
The AD7674 is an 800 kSPS, charge redistribution, 18-bit
SAR ADC (no latency).
Excellent Accuracy.
The AD7674 has a maximum integral nonlinearity of
2.5 LSB with no missing 18-bit codes.
Serial or Parallel Interface.
Versatile parallel (18-, 16- or 8-bit bus) or 3-wire serial
interface arrangement compatible with both 3 V and
5 V logic.
IN+
IN–
PD
WARP IMPULSE
PDBUF
CALIBRATION CIRCUITRY
CONTROL LOGIC AND
100–250
AD7651
AD7660/AD7661
AD7675
TM
AD7663
AD7678
Figure 1. Functional Block Diagram
©2003–2009 Analog Devices, Inc. All rights reserved.
Selection
SWITCHED
CAP DAC
REF REFGND
CNVST
CLOCK
AD7674
500–570
AD7650/AD7652
AD7664/AD7666
AD7665
AD7676
AD7679
AD7654
AD7655
INTERFACE
PARALLEL
SERIAL
PORT
DVDD
AD7674
www.analog.com
DGND
18
03083–0–001
800–
1000
AD7653
AD7667
AD7671
AD7677
AD7674
OVDD
OGND
D[17:0]
BUSY
RD
CS
MODE0
MODE1

Related parts for AD7674ASTZ

AD7674ASTZ Summary of contents

Page 1

FEATURES 18-bit resolution with no missing codes No pipeline delay (SAR architecture) Differential input range: ± REF REF Throughput: 800 kSPS (Warp mode) 666 kSPS (Normal mode) 570 kSPS (Impulse mode) INL: ±2.5 LSB max ...

Page 2

AD7674 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Product Highlights ........................................................................... 1 Table of Contents .............................................................................. 2 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 Timing Specifications ....................................................................... 5 Absolute ...

Page 3

SPECIFICATIONS Table 2. –40°C to +85° 4.096 V, AVDD = DVDD = 5 V, OVDD = 2 5.25 V, unless otherwise noted. REF Parameter RESOLUTION ANALOG INPUT Voltage Range Operating Input Voltage Analog Input CMRR Input ...

Page 4

AD7674 Parameter REFERENCE External Reference Voltage Range REF Voltage with Reference Buffer Reference Buffer Input Voltage Range REFBUFIN Input Current REF Current Drain DIGITAL INPUTS Logic Levels DIGITAL OUTPUTS 5 Data Format ...

Page 5

TIMING SPECIFICATIONS Table 3. –40°C to +85°C, AVDD = DVDD = 5 V, OVDD = 2 5.25 V, unless otherwise noted. Parameter Refer to Figure 34 and Figure 35 Convert Pulsewidth Time between Conversions (Warp Mode/Normal Mode/Impulse Mode) ...

Page 6

AD7674 Table 4. Serial Clock Timings in Master Read after Convert DIVSCLK[1] DIVSCLK[0] SYNC to SCLK First Edge Delay Minimum Internal SCLK Period Minimum Internal SCLK Period Maximum Internal SCLK HIGH Minimum Internal SCLK LOW Minimum SDOUT Valid Setup Time ...

Page 7

ABSOLUTE MAXIMUM RATINGS Table 5. AD7674 Absolute Maximum Ratings Parameter Analog Inputs 2 2 IN+ , IN– , REF, REFBUFIN, REFGND to AGND Ground Voltage Differences AGND, DGND, OGND Supply Voltages AVDD, DVDD, OVDD AVDD to DVDD, AVDD to OVDD ...

Page 8

AD7674 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS D4/DIVSCLK[0] D5/DIVSCLK[1] NOTES CONNECT. 2. THE EXPOSED PAD IS INTERNALLY CONNECTED TO AGND. THIS CONNECTION IS NOT REQUIRED TO MEET THE ELECTRICAL PERFORMANCES HOWEVER, FOR INCREASED RELIABILITY OF THE SOLDER ...

Page 9

Pin No. Mnemonic Type Description 9 D2/A1 DI/O When MODE = (18-bit or 16-bit interface mode), this pin is Bit 2 of the parallel port data output bus. In all other modes, this input pin controls ...

Page 10

AD7674 1 Pin No. Mnemonic Type Description 29 BUSY DO Busy Output. Transitions HIGH when a conversion is started. Remains HIGH until the conversion is complete and the data is latched into the on-chip shift register. The falling edge of ...

Page 11

DEFINITIONS OF SPECIFICATIONS Integral Nonlinearity Error (INL) Linearity error refers to the deviation of each individual code from a line drawn from negative full scale through positive full scale. The point used as negative full scale occurs ½ LSB before ...

Page 12

AD7674 TYPICAL PERFORMANCE CHARACTERISTICS 2.5 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 0 65536 131072 CODE Figure 5. Integral Nonlinearity vs. Code 70000 59121 58556 60000 50000 40000 30000 20000 10000 5073 2004C 2004D 2004E ...

Page 13

POSITIVE DNL (LSB) Figure 11. Typical Positive DNL Distribution (424 Units – REF SNR = 98.4dB –40 THD = 119.1dB SFDR = 120.4dB ...

Page 14

AD7674 105 104 103 102 101 100 –60 –50 –40 –30 INPUT LEVEL (dB) Figure 17. SNR and S/(N+D) vs. Input Level 100 SNR 99 S/(N+ –55 –35 – ...

Page 15

POSITIVE 10 FULL SCALE 0 ZERO ERROR 10 20 NEGATIVE FULL SCALE –30 4.50 4.75 5.00 AVDD (V) Figure 23. Zero Error, Positive and Negative Full Scale vs. Supply 5.25 5.50 0 ...

Page 16

AD7674 CIRCUIT INFORMATION IN+ REF REFGND IN– The AD7674 is a very fast, low power, single-supply, precise 18-bit analog-to-digital converter (ADC) using successive approximation architecture. The AD7674’s linearity and dynamic range are similar to or better than many Σ-Δ ADCs. ...

Page 17

Transfer Functions Except in 18-bit interface mode, the AD7674 offers straight binary and twos complement output coding when using OB See Figure 26 and Table 8 for the ideal transfer characteristic. 111...111 111...110 111...101 000...010 000...001 000...000 –FS ...

Page 18

AD7674 TYPICAL CONNECTION DIAGRAM Figure 27 shows a typical connection diagram for the AD7674. Different circuitry shown on this diagram is optional and is discussed later in this data sheet. Analog Inputs Figure 28 shows a simplified analog input section ...

Page 19

SNR 20 log LOSS ⎜ ⎜ + π ⎜ 625 f ( ⎝ – 3dB where the –3 dB input bandwidth in MHz of the AD7674 –3dB (26 MHz) or the cutoff frequency ...

Page 20

AD7674 100 FREQUECY (kHz) Figure 32. PSRR vs. Frequency POWER DISSIPATION VERSUS THROUGHPUT In Impulse mode, the AD7674 automatically reduces its power consumption at the end of each conversion phase. During ...

Page 21

RESET BUSY DATA BUS CNVST Figure 35. RESET Timing CNVST t 10 BUSY t 3 DATA PREVIOUS CONVERSION DATA BUS Figure 36. Master Parallel Data Timing for Reading (Continuous Read) PARALLEL ...

Page 22

AD7674 In Read after Conversion mode, it should be noted that unlike in other modes, the BUSY signal returns low after the 18 data bits are pulsed out and not at the end of the conversion phase, which results in ...

Page 23

This is particularly important during the second half of the conversion phase because the AD7674 provides error correction circuitry that can correct for an improper bit decision made during the first half of ...

Page 24

AD7674 CS CNVST BUSY t 3 SCLK SDOUT t 16 Figure 43. Slave Serial Data Timing for Reading (Read Previous Conversion during Convert) BUSY AD7674 #2 (UPSTREAM) #1 (DOWNSTREAM) RDC/SDIN SDOUT RDC/SDIN CNVST CS SCLK SCLK CNVST ...

Page 25

APPLICATION HINTS LAYOUT The AD7674 has very good immunity to noise on the power supplies. However, care should still be taken with regard to grounding layout. The printed circuit board that houses the AD7674 should be designed so that the ...

Page 26

... INDICATOR VIEW 1.00 12° MAX 0.85 0.80 SEATING PLANE ORDERING GUIDE Model Temperature Range 1 AD7674ASTZ −40°C to +85°C AD7674ASTZL −40°C to +85°C AD7674ACPZ −40°C to +85°C AD7674ACPZRL −40°C to +85°C 2 EVAL-AD7674CBZ EVAL-CED1Z 3 3 EVAL-CONTROL BRD2Z EVAL-CONTROL BRD3Z RoHS Compliant Part ...

Page 27

NOTES Rev Page AD7674 ...

Page 28

AD7674 NOTES ©2003–2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D03083-0-6/09(A) Rev Page ...

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