ADC121C021CIMK/NOPB National Semiconductor, ADC121C021CIMK/NOPB Datasheet
ADC121C021CIMK/NOPB
Specifications of ADC121C021CIMK/NOPB
ADC121C021CIMK
ADC121C021CIMKTR
Related parts for ADC121C021CIMK/NOPB
ADC121C021CIMK/NOPB Summary of contents
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... ADCs that also provide 8 and 10 bit resolution. For 8-bit ADCs see the ADC081C021 and ADC081C027. For 10-bit ADCs see the ADC101C021 and ADC101C027. Connection Diagrams 30020901 I2C® registered trademark of Phillips Corporation. © 2010 National Semiconductor Corporation ADC121C021/ADC121C027 Features ■ C-Compatible 2-wire Interface which supports standard (100kHz), fast (400kHz), and high speed (3 ...
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Ordering Information Order Code ADC121C021CIMK ADC121C021CIMKX ADC121C027CIMK ADC121C027CIMKX ADC121C021CIMM ADC121C021CIMMX Shipped with the ADC121C021. ADC121C021EB Block Diagram www.national.com Option Alert Pin Alert Pin TSOT-6 Tape-and-Reel Address Pin Address Pin TSOT-6 Tape-and-Reel Alert and Address Pins Alert and Address Pins MSOP-8 ...
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Pin Descriptions Symbol Type V Supply A GND Ground V Analog Input IN ALERT Digital Output SCL Digital Input Digital SDA Input/Output ADR0 Digital Input, three levels ADR1 Package Pinouts V A ADC121C021 1 TSOT-6 ADC121C027 1 TSOT-6 ADC121C021 5 ...
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... Absolute Maximum Ratings (Note 1, Note 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage Voltage on any Analog Input Pin to GND Voltage on any Digital Input Pin to GND Input Current at Any Pin ...
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Symbol Parameter DYNAMIC CONVERTER CHARACTERISTICS ENOB Effective Number of Bits SNR Signal-to-Noise Ratio THD Total Harmonic Distortion SINAD Signal-to-Noise Plus Distortion Ratio SFDR Spurious-Free Dynamic Range Intermodulation Distortion, Second Order Terms (IMD ) 2 IMD Intermodulation Distortion, Third Order Terms ...
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Symbol Parameter POWER REQUIREMENTS Supply Voltage Minimum V A Supply Voltage Maximum Continuous Operation Mode -- 2-wire interface active. I Supply Current N P Power Consumption N Automatic Conversion Mode -- 2-wire interface stopped and quiet (SCL = SDA = ...
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A.C. and Timing Characteristics The following specifications apply for 25°C, unless otherwise specified. A Symbol Parameter CONVERSION RATE Conversion Time f Conversion Rate CONV DIGITAL TIMING SPECS (SCL, SDA) f Serial Clock Frequency SCL t SCL Low ...
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Symbol Parameter t Fall time of SDA signal fDA t Rise time of SCL signal rCL Rise time of SCL signal after a t repeated start condition and after an rCL1 acknowledge bit. t Fall time of a SCL signal ...
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Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the ...
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Specification Definitions ACQUISITION TIME is the time required for the ADC to ac- quire the input voltage. During this time, the hold capacitor is charged by the input voltage. APERTURE DELAY is the time between the start of a con- ...
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Typical Performance Characteristics C, unless otherwise stated. INL vs. Code - V A INL vs. Code - V A INL vs. Supply f = 400kHz, f SCL =3V 30020922 =5V 30020924 30020926 11 = 22ksps 1kHz ...
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ENOB vs. Supply FFT Plot Offset Error vs. Temperature www.national.com SINAD vs. Supply 30020928 30020930 Gain Error vs. Temperature 30020932 12 30020929 FFT Plot 30020931 30020933 ...
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Continuous Operation Supply Current vs. V Power Down (PD ) Supply Current vs Automatic Conversion Supply Current vs 30020934 A 30020936 13 A 30020935 www.national.com ...
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Functional Description The ADC121C021 is a successive-approximation analog-to- digital converter designed around a charge-redistribution dig- ital-to-analog converter. Unless otherwise stated, references to the ADC121C021 in this section will apply to both the ADC121C021 and the ADC121C027. 1.1 CONVERTER OPERATION ...
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REFERENCE VOLTAGE The ADC121C021 uses the supply ( the reference must be treated as a reference. The analog-to-digital con- A version will only be as precise as the reference (V supply voltage should be ...
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Address Pointer Register The address pointer determines which of the data registers is accessed by the interface. The first data byte of every write operation is stored in the address pointer register. This value selects the ...
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Conversion Result Register This register holds the result of the most recent conversion. In the normal mode, a new conversion is started whenever this register is read. The conversion result data is in straight binary format with the MSB ...
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Configuration Register Pointer Address 02h (Read/Write) Default Value: 00h Cycle Time [2:0] Alert Alert (See Table at Hold Flag right) Enable Cycle Time[2:0] Conversion Interval Automatic Mode Disabled ...
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V -- Alert Limit Register - Over Range HIGH This register holds the upper limit threshold used to determine the alert condition. If the conversion moves higher than this limit alert is generated. HIGH Pointer Address 04h ...
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V -- Highest Conversion Register MAX This register holds the Highest Conversion result when in the Automatic mode. Each conversion result is compared against the contents of this register. If the value is higher, it replaces the previous value. ...
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Standard-Fast Mode In Standard-Fast mode, the master generates a start condi- tion by driving SDA from high to low while SCL is high. The start condition is always followed by a 7-bit slave address and a Read/Write bit. After ...
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Slave (Hardware) Address The ADC has a seven-bit hardware address which is also referred slave address. For the MSOP-8 version of the AD- C121C021, this address is configured by the ADR0 and ADR1 ...
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Alert Hold bit is cleared in the Configuration register. If the Alert Hold bit is set, the alert condition persists and only clears when a one is written to the Under Range Alert Flag bit. If the alert condition has ...
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Reading from a 2-Byte ADC Register The following diagrams indicate the sequence of actions re- quired for a 2-Byte read from an ADC121C021 Register. FIGURE 11. (a) Typical Read from a 2-Byte ADC Register with Preset Pointer FIGURE 12. ...
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Reading from a 1-Byte ADC Register The following diagrams indicate the sequence of actions required for a single Byte read from an ADC121C021 Register. FIGURE 13. (a) Typical Read from a 1-Byte ADC Register with Preset Pointer FIGURE 14. ...
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FIGURE 16. (b) Typical Write to a 2-Byte ADC Register 1.11 QUIET INTERFACE MODE To improve performance at High Speed, operate the ADC in Quiet Interface Mode. This mode provides improved INL and DNL performance Hs-Mode ...
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... BUFFERED INPUT A buffered input application circuit is shown in analog input is buffered by a National Semiconductor LMP7731. The non-inverting amplifier configuration provides a buffered gain stage for a single ended source. This appli- cation circuit is good for single-ended sensor interface. The ...
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INTELLIGENT BATTERY MONITOR The ADC121C021 is easily used as an intelligent battery monitor. The simple circuit shown in ADC121C021, the LP2980 fixed reference, and a resistor di- vider to implement an intelligent battery monitor with a window supervisory feature. ...
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Physical Dimensions inches (millimeters) unless otherwise noted Order Numbers ADC121C021CIMK & ADC121C027CIMK 6-Lead TSOT NS Package Number MK06A 8-Lead MSOP Order Numbers ADC121C021CIMM NS Package Number MUA08A 29 www.national.com ...
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