LTC2449CUHF#TR Linear Technology, LTC2449CUHF#TR Datasheet - Page 10

IC ADC 24BIT HI SPEED 38QFN

LTC2449CUHF#TR

Manufacturer Part Number
LTC2449CUHF#TR
Description
IC ADC 24BIT HI SPEED 38QFN
Manufacturer
Linear Technology
Datasheet

Specifications of LTC2449CUHF#TR

Number Of Bits
24
Sampling Rate (per Second)
8k
Data Interface
MICROWIRE™, Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
40mW
Voltage Supply Source
Single Supply
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
38-WFQFN, Exposed Pad
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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APPLICATIO S I FOR ATIO
first falling edge of SCK. The final data bit (Bit 0) is shifted
out on the falling edge of the 31st SCK and may be latched
on the rising edge of the 32nd SCK pulse. On the falling
edge of the 32nd SCK pulse, SDO goes HIGH indicating the
initiation of a new conversion cycle. This bit serves as EOC
(Bit 31) for the next conversion cycle. Table 2 summarizes
the output data format.
As long as the voltage on the IN
within the – 0.3V to (V
operating range, a conversion result is generated for any
differential input voltage V
+FS = 0.5 • V
+FS, the conversion result is clamped to the value corre-
sponding to the +FS + 1LSB. For differential input voltages
below –FS, the conversion result is clamped to the value
corresponding to –FS – 1LSB.
LTC2444/LTC2445/
LTC2448/LTC2449
10
Table 2. LTC2444/LTC2445/LTC2448/LTC2449 Output Data Format
Differential Input Voltage
V
V
0.5 • V
0.25 • V
0.25 • V
0
–1LSB
– 0.25 • V
– 0.25 • V
– 0.5 • V
V
*The differential input voltage V
IN
IN
IN
* ≥ 0.5 • V
* < –0.5 • V
*
REF
REF
REF
REF
REF
. For differential input voltages greater than
REF
REF
** – 1LSB
BUSY
SDO
SCK
**
** – 1LSB
**
SDI
CS
**
** – 1LSB
REF
U
REF
**
Hi-Z
**
CC
Figure 3. SDI Speed/Resolution, Channel Selection, and Data Output Timing
U
1
IN
BIT 31
EOC
+ 0.3V) absolute maximum
1
from –FS = –0.5 • V
+
2
and IN
BIT 30
“0”
IN
0
= IN
3
W
Bit 31
BIT 29
SIG
EOC
EN
0
0
0
0
0
0
0
0
0
0
+
– IN
pins is maintained
4
BIT 28 BIT 27 BIT 26 BIT 25 BIT 24 BIT 23 BIT 22 BIT 21
MSB
SGL
. **The differential reference voltage V
5
Bit 30
DMY
ODD
0
0
0
0
0
0
0
0
0
0
U
6
A2
REF
Bit 29
7
SIG
1
1
1
1
1
0
0
0
0
0
A1
to
8
A0
Bit 28
MSB
SERIAL INTERFACE PINS
The LTC2444/LTC2445/LTC2448/LTC2449 transmit the
conversion results and receive the start of conversion
command through a synchronous 3- or 4-wire interface.
During the conversion and sleep states, this interface can
be used to assess the converter status and during the
data output state it is used to read the conversion result
and program the speed, resolution and input channel.
Serial Clock Input/Output (SCK)
The serial clock signal present on SCK (Pin 38) is used to
synchronize the data transfer. Each bit of data is shifted out
the SDO pin on the falling edge of the serial clock.
In the Internal SCK mode of operation, the SCK pin is an
output and the LTC2444/LTC2445/LTC2448/LTC2449 cre-
ate their own serial clock. In the External SCK mode of
operation, the SCK pin is used as input. The internal or
9
OSR3
1
0
0
0
0
1
1
1
1
0
10
OSR2
Bit 27
11
0
1
1
0
0
1
1
0
0
1
OSR1
REF
12
BIT 20 BIT 19
OSR0 TWOX
= REF
Bit 26
13
0
1
0
1
0
1
0
1
0
1
+
– REF
14
Bit 25
.
0
1
0
1
0
1
0
1
0
1
BIT 0
32
LSB
2444 F04
Hi-Z
Bit 0
0
1
0
1
0
1
0
1
0
1
2444589fb

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