AD7828KP-REEL Analog Devices Inc, AD7828KP-REEL Datasheet - Page 8

• Manufacturer Part Number: AD7828KP-REEL
• Description: IC ADC 8BIT 8CH HS 28-PLCC
• Manufacturer: Analog Devices Inc

Specifications of AD7828KP-REEL

• Rohs Status: RoHS non-compliant
• Number Of Bits: 8
• Sampling Rate (per Second): 50k
• Data Interface: Parallel
• Number Of Converters: 3
• Power Dissipation (max): 100mW
• Voltage Supply Source: Single Supply
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 28-LCC (J-Lead)

AD7824/AD7828
UNIPOLAR OPERATION
The analog input range for any channel of the AD7824/AD7828 is
0 V to 5 V as shown in the unipolar operational diagram of
Figure 10. Figure 11 shows the designed code transitions that
occur midway between successive integer LSB values (i.e., 1/2 LSB,
3/2 LSB, 5/2 LSB, FS 3/2 LSBs). The output code is natural
binary with 1 LSB = FS/256 = (5/256) V = 19.5 mV.
Figure 11. Ideal Input/Output Transfer Characteristic for
Unipolar 0 V to 5 V Operation
BIPOLAR OPERATION
The circuit of Figure 12 is designed for bipolar operation. An
AD544 op amp conditions the signal input (V
positive voltages appear at AIN1. The closed loop transfer func-
tion of the op amp for the resistor values shown is given below:
The analog input range is ± 4 V and the LSB size is 31.25 mV.
The output code is complementary offset binary. The ideal
input/output characteristic is shown in Figure 13.
Figure 10. AD7824/AD7828 Unipolar 0 V to 5 V Operation
11111111
11111110
11111101
00000011
00000010
00000001
00000000
5V
0.1 F
0
*
1LSB 2LSB 3LSB
ADDITIONAL PINS OMITTED FOR CLARITY.
ONLY CHANNEL 1 SHOWN.
AIN
1 =
47 F
0V TO 5V
(
2 5 0 625
AIN, INPUT VOLTAGE – LSB
V
.
REF
V
5V
IN
−
.
V
V
AIN1
V
GND
DD
REF
REF
V
(+)
(–)
FULL-SCALE
IN
TRANSITION
AD7824*
AD7828*
)
Volts
1LSB =
IN
FS – 1LSB
) so that only
DB7
DB0
256
FS
FS
–8–
TIMING AND CONTROL
The AD7824/AD7828 has two digital inputs for timing and
control. These are Chip Select (CS) and Read (RD). A READ
operation brings CS and RD low, which starts a conversion on
the channel selected by the multiplexer address inputs (see
Table I). There are two modes of operation as outlined by the
timing diagrams of Figures 14 and 15. Mode 0 is designed for
microprocessors that can be driven into a WAIT state. A
READ operation (i.e., CS and RD are taken low) starts a con-
version and data is read when conversion is complete. Mode l
does not require microprocessor WAIT states. A READ operation
initiates a conversion and reads the previous conversion results.
A1
0
0
1
1
Figure 13. Ideal Input/Output Transfer Characteristic for
± 4 V Operation
AD7824
Figure 12. AD7824/AD7828 Bipolar ± 4 V Operation
11111111
11111110
11111101
10000010
10000001
10000000
01111111
01111110
00000010
00000001
00000000
Table I. Truth Table for Input Channel Selection
A0
0
1
0
1
V
5V
5V
IN
*
ADDITIONAL PINS OMITTED FOR CLARITY.
ONLY CHANNEL 1 SHOWN.
40k
27k
12k
–FS
0.1 F
2
+ 1LSB
AD544
25k
47 F
A2
0
0
0
0
1
1
1
1
5V
AIN, INPUT VOLTAGE – LSB
AD7828
A1
0
0
1
1
0
0
1
1
AIN1
V
V
V
GND
REF
DD
REF
0V
(+)
(–)
A0
0
1
0
1
0
1
0
1
AD7824*
AD7828*
DB7
DB0
FS = 8V
1LSB = FS/256
Channel
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
AIN8
+FS
2
REV. F