AD7828KPZ Analog Devices Inc, AD7828KPZ Datasheet - Page 3

• Manufacturer Part Number: AD7828KPZ
• Description: IC ADC 8BIT LC2MOS 8CH 28-PLCC
• Manufacturer: Analog Devices Inc

Specifications of AD7828KPZ

• Data Interface: Parallel
• Number Of Bits: 8
• Sampling Rate (per Second): 50k
• Number Of Converters: 3
• Power Dissipation (max): 100mW
• Voltage Supply Source: Single Supply
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 28-LCC (J-Lead)
• Resolution (bits): 8bit
• Sampling Rate: 50kSPS
• Input Channel Type: Differential
• Supply Voltage Range - Analog: 4.75V To 5.25V
• Supply Current: 16mA
• Digital Ic Case Style: LCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REV. F
Test Circuits
TIMING CHARACTERISTICS
Parameter
t
t
t
t
t
t
t
t
t
t
t
t
NOTES
1
2
3
4
Specifications subject to change without notice.
CSS
CSH
AS
AH
RDY
CRD
ACC1
ACC2
lNTH
DH
P
RD
Sample tested at 25°C to ensure compliance. All input control signals are specified with t
C
Measured with load circuits of Figure 1 and defined as the time required for an output to cross 0.8 V or 2.4 V.
Defined as the time required for the data lines to change 0.5 V when loaded with the circuits of Figure 2.
L
4
= 50 pF.
2
Figure 1. Load Circuits for Data Access Time Test
2
3
3
Limit at 25 C
(All Grades)
0
0
0
30
40
2.0
85
50
40
75
60
500
60
600
DBN
a. High-Z to V
b. High-Z to V
DBN
3k
DGND
5V
Limit at T
(K, L, B, C Grades)
0
0
0
35
60
2.4
110
60
65
100
70
500
80
500
3k
100pF
DGND
OH
100pF
OL
1
(V
DD
MIN
= 5 V; V
, T
MAX
REF
(+) = 5 V; V
Limit at T
(T, U Grades)
0
0
0
40
60
2.8
120
70
70
100
70
600
80
400
–3–
REF
RISE
(–) = GND = 0 V, unless otherwise noted.)
MIN
= t
, T
FALL
Figure 2. Load Circuits for Data Hold Time Test
MAX
= 20 ns (10% to 90% of 5 V) and timed from a voltage level of 1.6 V.
Unit
ns min
ns min
ns min
ns min
ns max
µs max
ns max
ns max
ns typ
ns max
ns max
ns min
ns min
ns max
DBN
a. V
b. V
DBN
Conditions/Comments
CS to RD Setup Time
CS to RD Hold Time
Multiplexer Address Setup Time
Multiplexer Address Hold Time
CS to RDY Delay. Pull-Up
Resistor 5 kΩ.
Conversion Time, Mode 0
Data Access Time after RD
Data Access Time after INT, Mode 0
RD to INT Delay
Data Hold Time
Delay Time between Conversions
Read Pulsewidth, Mode 1
3k
OH
OL
to High-Z
to High-Z
DGND
5V
3k
10pF
DGND
AD7824/AD7828
10pF