AD9260ASZ Analog Devices Inc, AD9260ASZ Datasheet
AD9260ASZ
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AD9260ASZ Summary of contents
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FEATURES Monolithic 16-bit, oversampled A/D converter 8× oversampling mode, 20 MSPS clock 2.5 MHz output word rate 1.01 MHz signal passband with 0.004 dB ripple Signal-to-noise ratio: 88.5 dB Total harmonic distortion: –96 dB Spurious-free dynamic range: 100 dB Input ...
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AD9260 TABLE OF CONTENTS Specifications..................................................................................... 3 Clock Input Frequency Range .................................................... 3 DC Specifications ......................................................................... 3 AC Specifications.......................................................................... 4 Digital Filter Characteristics ....................................................... 6 Digital Filter Characteristics ....................................................... 7 Digital Specifications ................................................................... 9 Switching Specifications ............................................................ 10 Absolute Maximum Ratings.......................................................... ...
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SPECIFICATIONS CLOCK INPUT FREQUENCY RANGE Table 1. Parameter—Decimation Factor (N) CLOCK INPUT (Modulator Sample Rate, f OUTPUT WORD RATE ( /N) CLOCK DC SPECIFICATIONS AVDD = +5 V, DVDD = +3 V, DRVDD = + ...
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AD9260 Parameter—Decimation Factor (N) DVDD and DRVDD Supply Current IAVDD IDVDD IDRVDD POWER CONSUMPTION 1 VINA and VINB connect to DUT CML. 2 Including Internal 2.5 V reference. 3 Excluding Internal 2.5 V reference. 4 Load regulation with 1 mA ...
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Parameter—Decimation Factor (N) Input Amplitude = –6.0 dBFS INPUT TEST FREQUENCY: 1.0 MHz (typ) Signal-to-Noise Ratio (SNR) Input Amplitude = –0.5 dBFS Input Amplitude = –6.0 dBFS SNR and Distortion (SINAD) Input Amplitude = –0.5 dBFS Input Amplitude = –6.0 ...
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AD9260 DIGITAL FILTER CHARACTERISTICS Table 4. Parameter 8× DECIMATION ( Pass-Band Ripple Stop-Band Attenuation Pass-Band Stop-Band Pass-Band/Transition Band Frequency (–0.1 dB Point) (–3.0 dB Point) 1 Absolute Group Delay Group Delay Variation 1 Settling Time (to ± 0.0007%) ...
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DIGITAL FILTER CHARACTERISTICS 0 –20 –40 –60 –80 –100 –120 0 0.2 0.4 0.6 FREQUENCY (NORMALIZED TO π) Figure 2. 8x FIR Filter Frequency Response 0 –20 –40 –60 –80 –100 –120 0 0.2 0.4 0.6 FREQUENCY (NORMALIZED TO π) ...
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AD9260 Table 5. Integer Filter Coefficients for First Stage Decimation Filter (23-Tap Half-Band FIR Filter) Lower Coefficient Upper Coefficient H(1) H(23) H(2) H(22) H(3) H(21) H(4) H(20) H(5) H(19) H(6) H(18) H(7) H(17) H(8) H(16) H(9) H(15) H(10) H(14) H(11) ...
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DIGITAL SPECIFICATIONS AVDD = +5 V, DVDD = + MIN Table 8. Parameter 1 CLOCK AND LOGIC INPUTS High Level Input Voltage (DVDD = +5 V) (DVDD = +3 V) Low Level Input Voltage (DVDD = ...
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AD9260 INPUT CLOCK RESET DAV SWITCHING SPECIFICATIONS AVDD = +5 V, DVDD = + pF Table 9. Parameters Clock Period Data Available (DAV) Period Data Invalid Data Set-Up Time Clock Pulse-Width High Clock Pulse-Width ...
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ABSOLUTE MAXIMUM RATINGS Table 10. Parameter AVDD to AVSS DVDD to DVSS AVSS to DVSS AVDD to DVDD DRVDD to DRVSS DRVSS to AVSS REFCOM to AVSS CLK, MODE, READ and RESET to DVSS Digital Outputs to DRVSS ...
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AD9260 TERMINOLOGY Integral Nonlinearity (INL) INL refers to the deviation of each individual code from a line drawn from “negative full scale” through “positive full scale. ” The point used as “negative full scale” occurs 1/2 LSB before the first ...
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PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 11. Pin Function Descriptions Pin No. Mnemonic 1 DVSS 2, 29, 38 AVSS 3 DVDD 4, 28, 44 AVDD 5 DRVSS 6 DRVDD 7 CLK 8 READ 9 BIT16 10–23 BIT15–BIT2 24 BIT1 25 ...
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AD9260 TYPICAL PERFORMANCE CHARACTERISTICS AVDD = DVDD = DRVDD = +5 Input Span, Differential DC Coupled Input with CML = 2 –20 –40 –60 –80 –100 –120 0 0.2 0.4 0.6 FREQUENCY (MHz) Figure ...
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TYPICAL AC CHARACTERIZATION CURVES VS. DECIMATION MODE AVDD = DVDD = DRVDD = + Input Span, Differential DC Coupled Input with CML = × MODE ...
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AD9260 TYPICAL AC CHARACTERIZATION CURVES FOR 8× MODE AVDD = DVDD = DRVDD = + Input Span, Differential DC Coupled Input with CML = 2 V, Full Bias –0.5dBFS –6.0dBFS –20dBFS 65 ...
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TYPICAL AC CHARACTERIZATION CURVES FOR 4× MODE AVDD = DVDD = DRVDD = + Input Span, Differential DC Coupled Input with CML = 2 V, Full Bias –0.5dBFS 80 –6.0dBFS –20dBFS 60 ...
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AD9260 TYPICAL AC CHARACTERIZATION CURVES FOR 2× MODE AVDD = DVDD = DRVDD = + Input Span, Differential DC Coupled Input with CML = 2 V, Full Bias 0.1 1.0 ...
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TYPICAL AC CHARACTERIZATION CURVES FOR 1× MODE AVDD = DVDD = DRVDD = + Input Span, Differential DC Coupled Input with CML = 2 V, Full Bias –0.5dBFS 60 –6.0dBFS –20dBFS 40 ...
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AD9260 TYPICAL AC CHARACTERIZATION CURVES AVDD = DVDD = DRVDD = + Input Span, A 100 QUARTER BIAS CLOCK FREQUENCY (MHz) Figure 47. SFDR ...
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ADDITIONAL AC CHARACTERIZATION CURVES AVDD = DVDD = DRVDD = + Input Span, A otherwise noted. 120 115 20 MSPS FULL BIAS 110 105 100 –50 –45 –40 –35 –30 –25 A (dBFS) ...
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AD9260 + V INT1 IN – 5B DAC1 + 16 – INT2 – ADC DAC ADC 5B DAC2 M OUT –D SHUFFLE Z CONTROL/TEST LOGIC DECIMATION FILTER STAGE 1 BANDGAP REFERENCE DECIMATION FILTER STAGE 2 REFERENCE ...
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THEORY OF OPERATION The AD9260 utilizes a new analog-to-digital converter architecture to combine sigma-delta techniques with a high speed, pipelined A/D converter. This topology allows the AD9260 to offer the high dynamic range associated with sigma- delta converters while maintaining ...
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AD9260 ANALOG INPUT AND REFERENCE OVERVIEW Figure 60, a simplified model of the AD9260, highlights the relationship between the analog inputs, VINA, VINB and the reference voltage VREF. Like the voltage applied to the top of the resistor ladder in ...
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SS1 CS1 VINA CPA1 CPB1 SS2 CS2 VINB CPA2 CPB2 SH3 SH4 Figure 61. Detailed Analog Input Structure Figure 61 illustrates the analog input structure of the AD9260. For the moment, ignore the presence of the parasitic capacitors CPA and ...
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AD9260 capacitances of the internal CMOS switches. This technique improves the linearity of the input switches and reduces the nonlinear parasitic capacitance. Thus, this technique reduces the nonlinear glitch energy. The capacitance values for the input capacitors and parasitic capacitors ...
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R V -VIN CML R 50Ω VIN 100pF -VIN CML 100pF 50Ω 100pF R R 0.1µF Figure 64. DC-Coupled Differential Driver with Level-Shifting beyond the ...
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AD9260 REFERENCE OPERATION The AD9260 contains an on-board band gap reference and internal reference buffer amplifier. The onboard reference provides a pin-strappable option to generate either 2.5 V output. With the addition of two external resistors, ...
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The actual reference voltages used by the internal circuitry of the AD9260 appear on the CAPT and CAPB pins. If VREF is configured for 2.5 V, thus providing full-scale input span, the voltages appear at CAPT and ...
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AD9260 DIGITAL INPUTS AND OUTPUTS DIGITAL OUTPUTS The AD9260 output data is presented in a twos complement format. Table 13 indicates the output data formats for various input ranges and decimation modes. A straight binary output data format can be ...
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A/D converters sees an abrupt change, the data in the analog modulator and digital filter will be corrupted. For this reason, following a pulse on the RESET pin, or change in channels (i.e., ...
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AD9260 Table 15. Recommended Mode Pin Ranges and Configurations Mode Pin Range Typical Mode Pin 0 V–0.5 V GND 0.5 V–1.5 V VREF/2 1.5 V–3.0 V CML 3.0 V–5.0 V AVDD BIAS PIN OPERATION The Bias Select Pin (BIAS) gives ...
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POWER DISSIPATION CONSIDERATIONS The power dissipation of the AD9260 is dependent on its application specific configuration and operating conditions. The analog power dissipation as shown in Figure 70 is primarily a function of its power bias setting and sample rate. ...
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AD9260 A/D with a total rms jitter of 15 ps, the SNR performance of the A/D will be limited to 86.5 dB. The clock input should be treated as an analog signal in cases where aperture jitter may affect the ...
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AD9260 is referenced DVDD while the output drivers are referenced to DRVDD. Also note that the SNR performance of the AD9260 remains independent of the digital or driver supply setting. The decoupling shown in Figure 75, a 0.1 µF ...
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AD9260 EVALUATION BOARD GENERAL DESCRIPTION The AD9260 Evaluation Board is designed to provide an easy and flexible method of exercising the AD9260 and demonstrate its performance to data sheet specifications. The evaluation board is fabricated in four layers: the component ...
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Table 18. Evaluation Board Reference Pin Configuration Reference Voltage Connect Jumper 2.5 V JP7 1.0 V JP6 External JP5, JP9, and JP10 The external reference circuitry is illustrated in Figure 77. By connecting or disconnecting JP10, the external reference can ...
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AD9260 APPLICATION INFORMATION 1. The ADC analog input should not be overdriven. Using a signal amplitude slightly lower than FSR will allow a small amount of headroom so that noise or DC offset voltage will not overrange the ADC and ...
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BIT02 BIT14 BIT01(MSB) BIT15 OTR BIT16(LSB) DAV READ CS CLK MDAVDD AVDD DRVDD AVSS DRVSS AVDD RESET DVDD SENSE AVSS VREF DVSS REFCOM Figure 78. Evaluation Board Top Level Schematic Rev Page AD9260 RD SHIELDED_TRACE ...
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AD9260 R21 J6 390Ω IN-2 R1 57.6Ω J7 IN-1 R15 57.6Ω 390Ω IKPOT R35 1kΩ 0.1µF 1 P4:+5V + C36 10mF C37 0.1mF + C40 10µF C41 0.1µF + C44 10µF C45 0.1µ P3:D5 + C32 22µF ...
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Figure 81. Evaluation Board Component Side Layout (Not to Scale) Figure 82. Evaluation Board Solder Side Layout (Not to Scale) Rev Page AD9260 ...
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AD9260 Figure 83. Evaluation Board Ground Plane Layout (Not to Scale) Figure 84. Evaluation Board Power Plane Layout (Not to Scale) Rev Page ...
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... MIN VIEW A ROTATED 90° CCW ORDERING GUIDE Model Temperature Range AD9260AS –40°C to +85°C AD9260ASRL –40°C to +85°C 2 AD9260ASZ –40°C to +85°C AD9260ASZRL –40°C to +85°C 2 AD9260- Metric Quad Flatpack Pb-free part. 1.03 0.88 2.45 MAX 0.73 ...
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AD9260 NOTES © 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C00581–0–7/04(C) Rev Page ...