KAD2708L-17Q68 Intersil, KAD2708L-17Q68 Datasheet

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... Communications Test Equipment Ordering Information PART NUMBER (Notes 1, 2) KAD2708L-35Q68 KAD2708L-27Q68 KAD2708L-21Q68 KAD2708L-17Q68 KAD2708L-10Q68 NOTES: 1. For Moisture Sensitivity Level (MSL), please see device information pages for KAD2708L-10, KAD2708L-17, KAD2708L-21, KAD2708L-27, and KAD2708L-35. For more information on MSL, please see Tech Brief TB363. ...

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... Functional Description .................................................12 Reset .........................................................................12 Voltage Reference .....................................................12 Analog Input ..............................................................12 Clock Input ................................................................13 Jitter ...........................................................................13 Digital Outputs ...........................................................14 Equivalent Circuits .......................................................14 Layout Considerations ................................................15 Split Ground and Power Planes ................................15 Clock Input Considerations.........................................15 Bypass and Filtering ..................................................15 LVDS Outputs ...........................................................15 Unused Inputs ...........................................................15 Definitions......................................................................15 Package Outline Drawing ............................................16 L68.10x10B ................................................................16 2 KAD2708L FN6813.1 April 14, 2011 ...

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... JA = 350MSPS, 270MSPS, 210MSPS, SAMPLE KAD2708L-21 KAD2708L-17 MAX MIN MAX MIN TYP TYP (Note 5) (Note 5) (Note 5) (Note 5) 1.5 1.6 1.4 1.5 1.6 1.4 210 198 860 860 1.8 1.9 1.7 1.8 1.9 1.7 3 ...

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... SAMPLE KAD2708L-21 KAD2708L-17 MAX MIN MAX MIN TYP TYP (Note 5) (Note 5) (Note 5) (Note 5) 237 263 211 241 170 105 50 50 ±0.2 0.4 -0.3 ±0.2 0.4 -0.3 ±0.2 ...

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... Input Capacitance CLKP, CLKN P-P Differential Input Voltage CLKP, CLKN Differential Input Resistance CLKP, CLKN Common-Mode Input Voltage LVDS OUTPUTS Differential Output Voltage Output Offset Voltage Output Rise Time Output Fall Time 5 KAD2708L SYMBOL CONDITIONS (Note 5) VREFSEL V 0.8*AVDD3 IH VREFSEL V IL VREFSEL I ...

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... Industry-standard protection techniques have been utilized in the design of this product. However, reasonable care must be taken in the storage and handling of ESD sensitive products. Contact Intersil for the specific ESD sensitivity rating of this product. 6 KAD2708L Sample PID ...

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... Exposed Paddle 7 KAD2708L NAME AVDD2 1.8V Analog Supply AVSS Analog Supply Return VREF Reference Voltage Out/In VREFSEL Reference Voltage Select (0:Int 1:Ext) VCM Common-Mode Voltage Output AVDD3 3.3V Analog Supply ...

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... AVSS 2 VREF 3 VREFSEL 4 VCM 5 AVDD3 6 AVSS 7 INP 8 INN 9 AVSS 10 DNC 11 DNC 12 DNC 13 AVDD2 14 AVDD3 15 AVDD3 16 CLKDIV 17 8 KAD2708L KAD2708L 68 QFN Top View Not to Scale FIGURE 2. PIN CONFIGURATION 51 D4P 50 D4N 49 D3P 48 D3N 47 D2P 46 D2N 45 OVSS 44 OVDD2 43 CLKOUTP 42 CLKOUTN 41 OVDD2 40 D1P 39 D1N 38 D0P 37 ...

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... FIGURE 3. SNR AND SFDR SNR SFDR FIGURE 5. SNR AND SFDR SFDR SNR 100 150 200 (MSPS FIGURE 7. SNR AND SFDR KAD2708L AVDD2 = OVDD2 = 1.8V, AVDD3 = 3.3V -0.5dBFS unless noted. IN -50 -55 -60 -65 HD3 -70 -75 -80 HD2 -85 - -20 HD3 -30 -40 -50 HD2 -60 -70 -80 - -65 -70 -75 HD3 -80 -85 HD2 -90 ...

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... CODE FIGURE 11. INTEGRAL NONLINEARITY vs OUTPUT CODE 0 -20 -40 -60 -80 -100 -120 FREQUENCY (MHz) FIGURE 13. OUTPUT SPECTRUM @ 9.865MHz 10 KAD2708L AVDD2 = OVDD2 = 1.8V, AVDD3 = 3.3V -0.5dBFS unless noted. (Continued 0.75 0.5 0.25 0 -0.25 -0.5 -0.75 -1 250 300 350 0 FIGURE 10. DIFFERENTIAL NONLINEARITY vs OUTPUT CODE ...

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... FIGURE 17. TWO-TONE SPECTRUM @ 140MHz, 141MHz 75 70 SFDR SNR 45 40 -40 - AMBIENT TEMPERATURE, C FIGURE 19. SNR AND SFDR vs TEMPERATURE 11 KAD2708L AVDD2 = OVDD2 = 1.8V, AVDD3 = 3.3V -0.5dBFS unless noted. (Continued Ain = -0.48dBFS SNR = 49.3dBFS -20 SFDR = 63dBc SINAD = 49.1dBFS -40 HD2 = -63dBc HD3 = -67dBc -60 -80 -100 -120 ...

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... An external voltage can be applied to this pin to provide a more accurate reference than the internally generated bandgap voltage or to match the full-scale reference among a system of KAD2708L chips. One option in the latter configuration is to use one KAD2708L's internally generated reference as the external reference voltage for the other chips in the system ...

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... VCM Ω 25O 0.1µF Use of the clock divider is optional. The KAD2708L's ADC requires a clock with 50% duty cycle for optimum performance. If such a clock is not available, one option is to generate twice the desired sampling rate, and then use the KAD2708L's divide-by-2 to generate a 50%-duty-cycle clock. ...

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... F 2 Φ FIGURE 28. ANALOG INPUTS 14 KAD2708L Any internal aperture jitter combines with the input clock jitter in a root-sum-square fashion, since they are not statistically correlated, and this determines the total jitter in the system. 14 Bits The total jitter, combined with other noise sources, then determines the achievable SNR ...

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... No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 15 KAD2708L Aperture Jitter is the RMS variation in aperture delay for a set of samples. Clock Duty Cycle is the ratio of the time the clock wave is at logic high to the total time of one clock period ...

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... Package Outline Drawing L68.10x10B 68 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 0, 11/08 PIN 1 10.00 INDEX AREA 6 10.00 TOP VIEW 8.00 Sq 9.65 Sq 7.70 Sq TYPICAL RECOMMENDED LAND PATTERN 16 KAD2708L Exp. DAP 7.70 Sq. 35 (4X) 0.15 34 68X 0.55 BOTTOM VIEW 0.90 Max 64X 0.50 68X 0. ...