IC TOUCH SCREEN CTLR 12-WLP

MAX11800EWC+T

Manufacturer Part NumberMAX11800EWC+T
DescriptionIC TOUCH SCREEN CTLR 12-WLP
ManufacturerMaxim Integrated Products
TypeResistive
MAX11800EWC+T datasheet
 


Specifications of MAX11800EWC+T

Touch Panel Interface4-WireNumber Of Inputs/keys1 TSC
Resolution (bits)12 bData InterfaceSerial, SPI™
Data Rate/sampling Rate (sps, Bps)105kVoltage - Supply1.7 V ~ 3.6 V
Operating Temperature-40°C ~ 85°CMounting TypeSurface Mount
Package / Case12-WLPVoltage Supply SourceSingle Supply
Sampling Rate (per Second)105kResolution11 bits
Interface TypeI2C, SPISupply Voltage (max)3.6 V
Supply Voltage (min)1.7 VConversion Rate34.4 KSPs
Maximum Operating Temperature+ 85 CMinimum Operating Temperature- 40 C
Mounting StyleSMD/SMTLead Free Status / RoHS StatusLead free / RoHS Compliant
Other namesMAX11800EWC+T
MAX11800EWC+TTR
  
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Low-Power, Ultra-Small Resistive Touch-Screen
Controllers with I
SPI Communication Sequence
(MAX11800/MAX11802)
The SPI interface consists of three inputs, DIN, DCLK,
CS, and one output, DOUT. A logic-high on CS dis-
ables the MAX11800/MAX11802 digital interface and
places DOUT in a high-impedance state. Pulling CS low
enables the MAX11800/MAX11802 digital interface. The
MAX11800/MAX11802 provide two possible implemen-
tations of SPI instructions. In rising-edge-driven opera-
tions, the devices are able to run at maximum clock
speeds. Carefully consider the hold time requirements
of the MAX11800/MAX11802 and minimize board skew
contributions when running the MAX11800/MAX11802
at maximum clock speed. In falling-edge-driven opera-
tions, the device is less sensitive to board skew contri-
butions, but slower clock speeds are required to meet
the MAX11800/MAX11802 setup time requirements. For
the MAX11800/MAX11802, read patterns output data is
either latched on the rising edge running at maximum
clock rates or on the falling edges running at reduced
clock rates.
CS
1
2
3
SCLK
A6
A5
A4
DIN
Figure 17. SPI Single Configuration Register Write Sequence—MAX11800/MAX11802
CS
1
SCLK
A
[6:0]
DIN
n
Figure 18. SPI Multiple Configuration Register Write Sequence—MAX11800/MAX11802
38
______________________________________________________________________________________
2
C/SPI Interface
Figure 17 shows the supported write operation
sequence for the MAX11800/MAX11802. A single con-
figuration register can be written in a 2-byte operation,
composed of a target register address (A[6:0], plus a
write mode indicator bit) followed by data to be written
to the target register (D[7:0]).
During write sequences, the DOUT line is not accessed
by the SPI. DOUT remains high impedance throughout
the command. Using the optional bus holder, the DOUT
line retains the previous value unless altered by a
device sharing the bus.
The MAX11800/MAX11802 SPI interface supports multi-
ple register write operations within a single sequence
as shown in Figure 18. By repeating the address plus
data byte pairs (in write mode), an unlimited number of
registers can be written in a single transfer. Do not per-
mit to combine write and read operations within the
same SPI sequence.
4
5
6
7
8
9
10
A3
A2
A1
A0
W
D7
D6
7
9
17
D
[7:0]
A
[6:0]
n
m
SPI Configuration Register Write
(MAX11800/MAX11802)
11
12
13
14
15
16
D5
D4
D3
D2
D1
D0
23
25
32
D
[7:0]
m