IC TOUCH SCREEN CTLR 12-WLP

MAX11800EWC+T

Manufacturer Part NumberMAX11800EWC+T
DescriptionIC TOUCH SCREEN CTLR 12-WLP
ManufacturerMaxim Integrated Products
TypeResistive
MAX11800EWC+T datasheet
 


Specifications of MAX11800EWC+T

Touch Panel Interface4-WireNumber Of Inputs/keys1 TSC
Resolution (bits)12 bData InterfaceSerial, SPI™
Data Rate/sampling Rate (sps, Bps)105kVoltage - Supply1.7 V ~ 3.6 V
Operating Temperature-40°C ~ 85°CMounting TypeSurface Mount
Package / Case12-WLPVoltage Supply SourceSingle Supply
Sampling Rate (per Second)105kResolution11 bits
Interface TypeI2C, SPISupply Voltage (max)3.6 V
Supply Voltage (min)1.7 VConversion Rate34.4 KSPs
Maximum Operating Temperature+ 85 CMinimum Operating Temperature- 40 C
Mounting StyleSMD/SMTLead Free Status / RoHS StatusLead free / RoHS Compliant
Other namesMAX11800EWC+T
MAX11800EWC+TTR
  
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Low-Power, Ultra-Small Resistive Touch-Screen
Controllers with I
Table 16. SPI Command and Data Format: 8 Bits
BIT 7
BIT 6
BIT 5
R6
R5
2
Table 17. I
C Command and Data Format: 8 Bits Plus ACK
BIT 7
BIT 6
BIT 5
R6
R5
R4
5) Panel Setup Commands: 6Ah to 6Fh
• Sets up panel prior to making X, Y, Z1, or Z2 mea-
surements
6) Measurement Commands: 70h to 7Fh
• Performs specified measurement (X, Y, Z1, and/or
Z2)
The commands to read or write the user-accessible
registers are always the same. However, the data for-
mat varies based on whether using an SPI or I
face. Tables 16 and 17 show the differences between
2
SPI and I
C protocols. For SPI, the R/W bit is embed-
ded in the 8-bit byte and always occupies the LSB
2
position. For I
C, the protocol is always 8-bit byte fol-
lowed by an acknowledge bit, for a total of 9 bits. The
2
LSB in I
C format is a don’t care. In write mode, for I
the LSB is ignored internal to the MAX11800–
MAX11803, so setting it to 0 or 1 has no effect.
Status and Configuration Registers
The status and configuration registers are located in
block 0x00 to 0x0B. See Table 18. All user-configura-
tion register write mode operations are pairable within
2
the SPI/I
C interface. Multiple locations can be written
under a single instruction with a register byte followed
by a data. All user-configuration read-mode operations
support autoincrement. For example, if location 0x00 is
read back and more clock pulses are issued, readback
will proceed through location 0x01 and so forth. The
user should set all configuration registers to the desired
values before issuing direct conversion operations or
placing MAX11800/MAX11801 in autonomous mode.
46
______________________________________________________________________________________
2
C/SPI Interface
BYTE
BIT 4
BIT 3
R4
R3
R2
Command or Data
BYTE
BIT 4
BIT 3
BIT 2
R3
R2
R1
Command or Data
Use the readback command 0x50 to read back available
FIFO data in autonomous conversion modes (AUTO = 1)
(MAX11800/MAX11801). The oldest available data is
read out first. Data blocks vary from 32 to 64 bits in
length, depending on the scan mode selected. Reading
back longer than one block results in reading back the
next available block. The end-of-file indicator (event
2
C inter-
tag = 11) is read back when no unread data is available
in the FIFO. This command does not autoincrement and
the register address does not advance beyond 0x50.
See the FIFO Data Block Readback Structure section for
more details.
2
C,
Use the readback commands 0x52 to 0x5B to read
back available measurement data gathered in direct
conversion mode (AUTO = 0). Random data access is
supported within this register space and the commands
autoincrement up to register 0x5B. The register
address does not advance beyond register 0x5B.
Attempting to read back a pending conversion results
in data being tagged invalid. See the Direct Conversion
Mode Operations section for more details.
The panel setup and conversion commands are not
pairable in write mode as each command modifies the
panel setting both during and after the command,
based on conversion executions and CONT bit set-
tings. All direct conversion commands modify the
expected I
streamlining protocol. Table 21 shows the resulting
read register settings by command type applicable to
2
I
C variants.
BIT 2
BIT 1
R0
R1
(CONT)
BIT 1
BIT 0
X
R0
(Don’t Care)
Data Readback Commands
Autonomous Conversion Mode
Direct Conversion Mode
2
C read register location to support the data
BIT 0
R/
1/0
ACK
BIT
1/0
1/0