MAX11803ETC+T Maxim Integrated Products, MAX11803ETC+T Datasheet - Page 44

• Manufacturer Part Number: MAX11803ETC+T
• Description: IC TOUCH SCREEN CTLR 12-TQFN
• Manufacturer: Maxim Integrated Products
• Type: Resistiver

Specifications of MAX11803ETC+T

• Touch Panel Interface: 4-Wire
• Number Of Inputs/keys: 1 TSC
• Resolution (bits): 12 b
• Data Interface: I²C, Serial
• Data Rate/sampling Rate (sps, Bps): 105k
• Voltage - Supply: 1.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 12-TQFN Exposed Pad
• Voltage Supply Source: Single Supply
• Sampling Rate (per Second): 105k
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Low-Power, Ultra-Small Resistive Touch-Screen
Controllers with I
reading one byte from the MAX11801/MAX11803.
Figure 28 illustrates the frame format for reading multi-
ple bytes from the MAX11801/MAX11803.
As previously indicated, the MAX11801/MAX11803
read sequence does not limit how many bytes one can
read. Where allowed, the internal register counter
keeps incrementing as additional bytes are requested,
the first byte out is Reg(N), next byte out is Reg(N+1),
next byte out is Reg(N+2), and so on. The user needs
to track the incremented register address.
Acknowledge pulses from the master are not
required to autoincrement the internal register loca-
tion; the internal register location updates on each
byte. See the register map for details governing the
incrementing of register addresses.
Some registers autoincrement only up to a point (for
example, the X, Y, Z1, Z2, and AUX result registers).
This is to prevent inadvertent readback of unrelated or
reserved data locations. For example, if beginning at
the XMSB register, a user can cycle through the XLSB
register to the YMSB register and so forth up to the
AUXLSB register. The MAX11801/MAX11803 do not
autoincrement beyond the AUXLSB register; if bytes
continue to be given, the AUXLSB register readback is
repeated.
Some registers do not autoincrement (for example, the
FIFO register). This is intentional as it allows multiple
readbacks of the same location (in this case, allowing
the user to access multiple FIFO memory blocks with a
single read operation). Note that when reading back
FIFO registers, data management is handled in
blocks (not bytes); thus, if an I
plies at least one cycle for readback of the first byte of
a FIFO block, the entire block is marked as read
(regardless of whether the block or even byte read
back is run to completion).
The MAX11801/MAX11803 support several streamlined
readback behaviors for several commands to signifi-
cantly improve data transfer efficiency.
Figure 29. I
44
SDA
SCL
______________________________________________________________________________________
2
START
C Streamlined Read Sequence
1
BYTE 3: DEVICE ADDRESS
0
Streamlined I
WRITE ADDRESS
A = ACKNOWLEDGE
0
ACKNOWLEDGE GENERATED BY MAX11801/MAX11803
1
0
A1 A0
2
C read operation sup-
2
R
C Read Operations
A
D
2
BYTE 4: REG(N)[7:0] DATA
D
C/SPI Interface
D
READ DATA
D
D
D
D
D
The MAX11801/MAX11803 internal address pointer
autoincrements after each read data byte. This autoin-
crement feature allows all registers to be read sequen-
tially within one continuous frame. A STOP condition
can be issued after any number of read data bytes. If a
readback sequence is stopped, readback can later be
resumed from the current (autoincremented) register
location; it is not necessary to supply the initial register
address and register selection sequence. Users can
simply begin with a START followed by the device slave
address with R/W set high. Following the acknowledge,
data readback commences from the previous register
address (next register address after the first one is suc-
cessfully read). This sequence is designated as a
“streamlined sequence” and is shown in Figure 29.
If the user accesses the FIFO register (the FIFO does
not autoincrement) and reads several conversion
results and then stops, when returning for more FIFO
data it is only necessary to simply issue the streamlined
readback sequence to continue to gather results from
the FIFO. Thus, once the MAX11801 is placed in
autonomous conversion mode, the user needs only
issue the full readback sequence once for the initial
FIFO access. From this point on, streamlined read
access to the part resumes at the next available FIFO
location (unless an intervening command is issued to
modify the device’s register address pointer).
Likewise, if a user is reading back result registers, the
user can begin with XMSB and autoincrement to XLSB,
and then stop. If the user resumes by simply issuing the
streamlined readback sequence, data readback com-
mences from the YMSB location. This behavior remains
valid unless another direct conversion or configuration
command has been issued (see next).
A
~A = NOT ACKNOWLEDGE
Resumed Read Operation of the Results Registers
ACKNOWLEDGE GENERATED BY I
SEQUENTIAL READ
Resumed Read Operation of the FIFO Register
DATA BYTES
READ DATA
ADDITONAL
D
2
C MASTER
D
READ DATA (LAST BYTE)
D
D
Resumed Read Operations
D
(MAX11801/MAX11803)
D
D
D
~A
(MAX11801)
STOP