IC TOUCH SCREEN 12BIT SER 64TQFP

TSC2301IPAGRG4

Manufacturer Part NumberTSC2301IPAGRG4
DescriptionIC TOUCH SCREEN 12BIT SER 64TQFP
ManufacturerTexas Instruments
TypeResistive, Audio Codec, Headphone Amp
TSC2301IPAGRG4 datasheet
 


Specifications of TSC2301IPAGRG4

Touch Panel Interface4-WireNumber Of Inputs/keys1, 4 x 4 Keypad
Resolution (bits)12 bData InterfaceSerial, SPI™
Data Rate/sampling Rate (sps, Bps)125kVoltage ReferenceExternal, Internal
Voltage - Supply2.7 V ~ 3.6 VOperating Temperature-40°C ~ 85°C
Mounting TypeSurface MountPackage / Case64-TQFP, 64-VQFP
Voltage Supply SourceSingle SupplySampling Rate (per Second)125k
For Use With296-19022 - EVAL MODULE FOR TSC2301Lead Free Status / RoHS StatusLead free / RoHS Compliant
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PROGRAMMABLE TOUCH SCREEN CONTROLLER
FEATURES
SPI™ Serial Interface
Touch Screen Controller
– 4-Wire Touch Screen Interface
– Internal Detection of Screen Touch and
Keypad Press
– Touch Pressure Measurement
– Ratiometric Conversion
– Programmable 8-, 10- or 12-Bit Resolution
– Programmable Sampling Rates Up to 125
kHz
– Direct Battery Measurement (0 to 6 V)
– On-Chip Temperature Measurement
– 4-by-4 Keypad Interface With
Programmable De-Bounce and Key
Masking
– Integrated Touch Screen Processor
Reduces Host CPU Interrupts and Overhead
– Internal Timing Control With Programmable
Delays and Averaging
Stereo Audio Codec
– 20-Bit Delta-Sigma ADC/DAC
– Dynamic Range: 98 dB
– Sampling Rate Up to 48 kHz
2
– I
S Serial Interface
– Stereo 16-
Headphone Driver
Full Power-Down Control
8-Bit Current Output DAC
On-Chip Crystal Oscillator
Programmable Bass/ Midrange/ Treble EQ
Effects Processing
6 GPIO Pins
Single 2.7-V to 3.6-V Supply
64-Pin TQFP Package
120-Ball MicroStar Junior™ BGA Package
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
MicroStar Junior is a trademark of Texas Instruments.
SPI is a trademark of Motorola.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
WITH STEREO AUDIO CODEC
APPLICATIONS
Personal Digital Assistants
Cellular Phones
MP3 Players
Internet Appliances
Smartphones
DESCRIPTION
The TSC2301 is a highly integrated PDA analog
interface circuit. It contains a complete 12-bit A/D
resistive touch screen converter (ADC) including
drivers, touch pressure measurement capability,
keypad controller, and 8-bit D/A converter (DAC)
output for LCD contrast control. The TSC2301 offers
programmable resolution of 8, 10, and 12 bits and
sampling rates up to 125 kHz to accommodate
different screen sizes. The TSC2301 interfaces to the
host controller through a standard SPI serial
interface.
The TSC2301 features a high-performance 20-bit,
48-ksps stereo audio codec with highly integrated
analog functionality. The audio portion of the
TSC2301 contains microphone input with built-in
pre-amp and microphone bias circuit, an auxiliary
stereo analog input, a stereo line-level output, a
differential mono line-level output, and a stereo
headphone amplifier output. The digital audio data is
transferred through a standard I
programmable PLL for generating audio clocks from a
wide variety of system clocks is also included.
The TSC2301 also offers two battery measurement
inputs capable of battery voltages up to 6 V, while
operating at a supply voltage of only 2.7 V. It also has
an on-chip temperature sensor capable of reading
0.3°C resolution. The TSC2301 is available in 64-lead
TQFP, and 120-ball VFBGA packages.
US Patent No. 6246394
FUNCTIONAL BLOCK DIAGRAM
TSC2301
SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004
2
S interface. A fully
Copyright © 2002–2004, Texas Instruments Incorporated

TSC2301IPAGRG4 Summary of contents

  • Page 1

    ... Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. MicroStar Junior is a trademark of Texas Instruments. SPI is a trademark of Motorola. PRODUCTION DATA information is current as of publication date. ...

  • Page 2

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 AVDD - 1V AVDD 30k VCM 20k AGND Mute, 0db, 6dB, 12dB MICIN RLINEIN +12dB 35dB 0.5dB steps LLINEIN MONO+ MONO- VREF+ VREF- HPVDD Headphone HPGND Driver HPR ...

  • Page 3

    PRODUCT PACKAGE PACKAGE DESIGNATOR TQFP-64 TSC2301I VFBGA-120 ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range unless otherwise noted Supply voltage AVDD, HPVDD, DVDD Ground voltage differences AGND, DGND Digital input voltage Analog input voltage Ambient temperature under bias, T ...

  • Page 4

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 ELECTRICAL CHARACTERISTICS At 25°C, HPV = +3 Parameter Auxilary Analog Inputs Input voltage range Input capacitance Input leakage current Battery Monitor Input ...

  • Page 5

    ELECTRICAL CHARACTERISTICS (continued) At 25°C, HPV = +3 Parameter Output power per channel Signal-to-noise ratio, A-weighted Total harmonic distortion D/A Converter Output current range Resolution Voltage Reference TSC2301IPAG Voltage range ...

  • Page 6

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 MONO+ 49 MONO– 50 VOUTR 51 VOUTL 52 AGND 53 AVDD 54 HPL 55 HPR 56 HPGND 57 X– 58 Y– HPVDD 62 AUX1 63 AUX2 ...

  • Page 7

    VFBGA TQFP I/O BALL PIN ...

  • Page 8

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 VFBGA TQFP I/O BALL PIN D10 61 I C11 62 I B11 63 I B10 Lead SCLK t w sck t v MSB OUT MISO t a ...

  • Page 9

    +25° +3 CHANGE IN GAIN ERROR vs TEMPERATURE 1 0.5 0 –0.5 –1 –1.5 –2 – 100 Temperature (5C) Figure 1. TOUCH SCREEN DRIVER ON-RESISTANCE vs TEMPERATURE 6.5 ...

  • Page 10

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 TYPICAL CHARACTERISTICS (continued +25° REF INTERNAL 2.5-V REFERENCE vs TEMPERATURE 2.5 2.495 2.49 2.485 2.48 2.475 2.47 ...

  • Page 11

    TYPICAL CHARACTERISTICS (continued +25° REF SNR OF DAC (LINEOUT) vs TEMPERATURE 99 98.875 98.75 98.625 98.5 98.375 98.25 98.125 98 –60 –40 – ...

  • Page 12

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 TYPICAL CHARACTERISTICS (continued +25° REF SNR OF BYPASS PATH vs TEMPERATURE 102 101 100 ...

  • Page 13

    TYPICAL CHARACTERISTICS (continued +25° REF TEMP2 DIODE VOLTAGE vs SUPPLY VOLTAGE 730 728 726 724 722 720 2.5 3.5 3 Vdd (V) Figure 25. DAC ...

  • Page 14

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 TYPICAL CHARACTERISTICS (continued +25° REF INL MINIMUM vs SUPPLY VOLTAGE –1.5 –1.75 –2 –2.25 –2.5 –2.75 –3 ...

  • Page 15

    TYPICAL CHARACTERISTICS (continued +25° REF SNR OF ADC (LINEIN) vs SUPPLY VOLTAGE 2.5 3 3.5 Vdd (V) ...

  • Page 16

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 TYPICAL CHARACTERISTICS (continued +25° REF The TSC2301 is an analog interface circuit for human interface devices. A ...

  • Page 17

    OVERVIEW (continued) MICROPHONE JACK HEADPHONE JACK 10 to 100 220 F MONO AMP 1 F Line Outputs 0 TOUCH SCREEN 0 Auxilliary ...

  • Page 18

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 DETAILED DESCRIPTION (continued) The TSC2301 supports the resistive 4-wire configuration (see coordinate pair dimensions, although a third dimension can be added for measuring pressure. The 4-Wire Touch Screen Coordinate Pair Measurement ...

  • Page 19

    R X–position X–plate R + TOUCH 4096 When the touch panel is pressed or touched, and the drivers to the panel are turned on, the voltage across the touch panel often overshoots and then slowly settles (decay) down to ...

  • Page 20

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 The ADC is controlled by an ADC control register. Several modes of operation are possible, depending upon the bits set in the control register. Channel selection, scan operation, averaging, resolution, and ...

  • Page 21

    Reference The TSC2301 has an internal voltage reference that can be set to 1 2.5 V, through the reference control register. This reference can also be set to automatically power down between conversions to save power, or ...

  • Page 22

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 Y+ X+ Y– Figure 49. PENIRQ Functional Block Diagram In modes where the TSC2301 needs to detect if the screen is still touched (for example, when doing a PENIRQ-initiated X, Y, ...

  • Page 23

    DIGITAL INTERFACE The TSC2301 communicates through a standard SPI bus. The SPI allows full-duplex, synchronous, serial communication between a host processor (the master) and peripheral devices (slaves). The SPI master generates the synchronizing clock and initiates transmissions. The SPI ...

  • Page 24

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 Continuous writing is generally not recommended for the control registers, but for the coefficients of bass-boost filter coefficient registers, continuous writing works. Writing to these registers consists of the processor writing ...

  • Page 25

    TSC2301 MEMORY MAP The TSC2301 has several 16-bit registers that allow control of the device as well as providing a location for results from the TSC2301 to be stored until read by the host microprocessor. These registers are separated ...

  • Page 26

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 TSC2301 REGISTER OVERVIEW PAGE ADDR REGISTER D15 D14 (HEX) NAME ...

  • Page 27

    Table 4. Register Summary for TSC2301 (continued) PAGE ADDR REGISTER D15 D14 D13 (HEX) NAME 1 0F reserved KPMASK M15 M14 M13 1 11 reserved reserved reserved ...

  • Page 28

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 Table 4. Register Summary for TSC2301 (continued) PAGE ADDR REGISTER D15 D14 (HEX) NAME 2 1B ADCLKCF reserved reserved ...

  • Page 29

    TSC2301 TOUCH SCREEN CONTROL REGISTERS This section describes each of the registers shown in the memory map of according to the function they control. In the TSC2301, bits in control registers can refer to slightly different functions depending upon ...

  • Page 30

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 Bits [13:10] — AD3 - AD0 ADC Function Select bits. These bits control which input converted, and what mode the converter is placed in. These bits are the ...

  • Page 31

    Bits[7:6] — AV1, AV0 Converter Averaging Control. These two bits (see converter performs. Note that when averaging is used, the STS/STP bit and the DAV output indicates that the converter is busy until all conversions necessary for the averaging ...

  • Page 32

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 MSB DPD Bit 15 — DPD DAC Power Down. This bit controls whether the DAC is powered ...

  • Page 33

    Value 0 1 Note that the PDN bit, in concert with the INT bit, creates a few possibilities for reference behavior. These are detailed in Table 16. INT Bit 0 — RFV Reference Voltage Control. ...

  • Page 34

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 Bits [5:3] — PRE[2:0] Precharge time selection bits. These bits set the amount of time allowed for precharging any pin capacitance on the touch screen prior to sensing if the screen ...

  • Page 35

    TSC2301 KEYPAD REGISTERS The keypad scanner hardware in the TSC2301 is controlled by two registers: the keypad control register and the keypad mask register. The keypad control register controls general keypad functions such as scanning and de-bouncing, while the ...

  • Page 36

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 Keypad Mask Register (Page 1, Address 10H) The Keypad Mask register is formatted as follows: Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 MSB M15 M14 M13 M12 M11 ...

  • Page 37

    Bit 15 — SDAV (write only) SPI Data Available. This read-only bit mirrors the function of the DAV pin. This bit is provided so that the host processor can poll the SPI interface to see whether data is available, ...

  • Page 38

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 Bit 12 — PCTE PLL Control Enable. This bit allows the user to manually control the audio codec internal PLL. This allows the user to modify the contents of bits [11-0] ...

  • Page 39

    MCLK (MHz) Desired F (MHz) out 19.68 22.5792 TSC2301 DATA REGISTERS The data registers of the TSC2301 hold data results from conversions or keypad scans, or the value of the DAC output current. All of these registers default to ...

  • Page 40

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 If only X and Y coordinates are to be measured, then the conversion process is complete. flowchart for this process. The time it takes to go through this process depends upon ...

  • Page 41

    Touch Screen Scan X and Y PENIRQ Initiated Screen Touch Issue Interrupt PENIRQ N Is PENSTS =1 Y Start Clock Turn On Drivers: Y Panel Voltage Stabilization Done Y Power up ADC Convert Y coordinates ...

  • Page 42

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 Touch Screen Scan X, Y and Z PENIRQ Initiated Screen Touch Issue Interrupt PENIRQ Host Controlled Is PENSTS =1 Conversion Y Start Clock Turn On Drivers: Y+, Y ...

  • Page 43

    Conversion Controlled by TSC2301 Initiated By Host Responding to PENIRQ This mode is provided for users who want more control over the A/D conversion process. This mode requires more overhead from the host processor generally not ...

  • Page 44

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 Screen Touch Issue Interrupt PENIRQ Is PENSTS =1 Host Writes A/D Converter Control Register Reset PENIRQ Start Clock Turn On Drivers: Y Panel Voltage Stabilization Done Y ...

  • Page 45

    Touch Screen Scan X, Y and Z Host Initiated Screen Touch Issue Interrupt PENIRQ Host Controlled Is PENSTS =1 Conversion Host Writes A/D Converter Done Control Register Reset PENIRQ Start Clock Turn On Drivers: Y+, Y ...

  • Page 46

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 Touch Screen Scan X Coordinate Host Initiated Screen Touch Issue Interrupt PENIRQ Is PENSTS =1 Host Writes A/D Converter Control Register Reset PENIRQ Are Drivers On Y Start Clock Power up ...

  • Page 47

    Touch Screen Scan Y Coordinate Host Initiated Screen Touch Issue Interrupt PENIRQ N Is PENSTS =1 Host Writes A/D Converter Control Register Reset PENIRQ N Are Drivers On Y Start Clock Power up ADC Convert Y coordinates N Is ...

  • Page 48

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 Touch Screen Scan Z Coordinate Host Initiated Screen Touch Issue Interrupt PENIRQ Is PENSTS =1 Host Writes A/D Converter Control Register Reset PENIRQ Are Drivers On Start Clock Power up ADC ...

  • Page 49

    Instead of starting a sequence in the TSC2301, which then reads each coordinate in turn, the host now must control all aspects of the conversion. An example sequence would be: (a) PENIRQ goes low ...

  • Page 50

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 Screen Touch Issue Interrupt PENIRQ Go To Host Controlled N Is PENSTS =1 Host Writes A/D Converter Control Register Reset PENIRQ Turn On Drivers: X Done Figure 58. X ...

  • Page 51

    Screen Touch Issue Interrupt PENIRQ Go To Host Controlled N Is PENSTS =1 Conversion Host Writes A/D Converter Control Register Reset PENIRQ Turn On Drivers: Y Done Figure 59. Y Coordinate Reading Controlled by Host SLAS371D – ...

  • Page 52

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 Screen Touch Issue Interrupt PENIRQ Is PENSTS =1 Host Writes A/D Converter Control Register Reset PENIRQ Turn On Drivers: X Done Host Writes A/D Converter Control Register Reset PENIRQ ...

  • Page 53

    OPERATION - TEMPERATURE MEASUREMENT In some applications, such as estimating remaining battery life or setting RAM refresh rate, a measurement of ambient temperature is required. The temperature measurement technique used in the TSC2301 relies on the characteristics of a ...

  • Page 54

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 N Figure 62. Single Temperature Measurement Mode 54 Temperature Input 1 Host Writes A/D Converter Control Register Start Clock Power Up Reference (Including Programmed Delay) Power up ADC Convert Temperature Input ...

  • Page 55

    Figure 63. Additional Temperature Measurement for Differential Temperature Reading OPERATION - BATTERY MEASUREMENT An added feature of the TSC2301 is the ability to monitor the battery voltage which may be much larger than the supply voltage of the TSC2301. ...

  • Page 56

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 Figure 64. VBAT Example Battery Measurement Functional Block Diagrams, VDD = 2 Flowcharts which detail the process of making a battery input reading are shown in The time needed ...

  • Page 57

    N This assumes the reference control register is configured to power up the internal reference when needed. Battery Input 1 Host Writes A/D Converter Control Register Start Clock Power Up Reference (Including Delay) Power up ADC Convert Battery Input ...

  • Page 58

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 N OPERATION - AUXILIARY MEASUREMENT The two auxiliary voltage inputs can be measured in similar fashion to the battery inputs, with no voltage dividers. The input range of the auxiliary inputs ...

  • Page 59

    Converter Control Power Up Reference N Store Auxiliary Input 1 in AUX1 Register Figure 67. AUX1 Measurement Process Auxiliary Input 1 Host Writes A/D Register Start Clock (Including Delay) Power Down ADC Power up ADC Power Down Reference Convert ...

  • Page 60

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 60 Auxiliary Input 2 Host Writes A/D Converter Control Register Start Clock Power Up Reference (Including Delay) Power up ADC Convert Auxiliary Input 2 Is Data N Averaging Done Y Store ...

  • Page 61

    OPERATION - PORT SCAN If measurements of all the battery and auxiliary inputs are required, the port scan mode can be used. This mode causes the TSC2301 to sample and convert both battery inputs and both auxiliary inputs. At ...

  • Page 62

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 OPERATION - D/A CONVERTER The TSC2301 has an onboard 8-bit DAC, configured as shown in sink (AOUT) controlled by the value of a resistor connected between the ARNG pin and ground. ...

  • Page 63

    Figure 71. DAC Output Current Range vs RRNG Resistor Value For example, consider an LCD that has a contrast control voltage VBIAS that can range from that draws 400 µA when used, and has ...

  • Page 64

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 Figure 72. DAC Circuit When Using V+ Higher Than 2N3904 AOUT VDD DAC 8–Bits ARNG RRNG www.ti.com V BIAS . supply ...

  • Page 65

    OPERATION - KEYPAD INTERFACE The TSC2301 contains a keypad interface that is suitable for use with matrix keypads keys. A control register, the keypad control register, is used to set the scan rate for ...

  • Page 66

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 AUDIO CODEC Audio Analog I/O The TSC2301 has one pair of stereo inputs, LLINEIN and RLINEIN, and one mono audio input, MICIN. The part also has one pair of stereo line ...

  • Page 67

    FORMAT 0 DAC: 16–Bit, MSB–First, Right–Justified LRCIN BCKIN I2SDIN 16 1 MSB ADC: 16–Bit, MSB–First, Left–Justified LRCIN BCKIN I2SDOUT MSB FORMAT 1 DAC: 20–Bit, MSB–First, Right–Justified LRCIN BCKIN I2SDIN MSB ADC: 20–Bit, ...

  • Page 68

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 – – LRCIN BCKIN ...

  • Page 69

    Table 29. Audio Data Input/Output Timing (continued) Parameter Falling time to all signals TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 Symbol Min t FALL Max ...

  • Page 70

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 Audio Data Converters The TSC2301 includes a stereo 20-bit audio DAC and a stereo 20-bit audio ADC. The DAC and ADC are both capable of operating at 8 kHz, 11.025 kHz, ...

  • Page 71

    Stereo DAC Overview The stereo DAC consists of a digital block to implement digital interpolation filter, volume control, de-emphasis filter and programmable digital effects/bass-boost filter for each channel. These are followed by a fifth-order single-bit digital delta-sigma modulator, and ...

  • Page 72

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 27618 32130 -27033 -31505 26461 which implements the bass-boost transfer function ...

  • Page 73

    The ADC modulator and digital filter operate on a clock that changes directly with Fs. This is in contrast to the DAC, which keeps the modulator running at a high rate of 128 x 44.1 kHz or 128 x ...

  • Page 74

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 Table 30. Power Consumption by Mode of Operation Operating Mode Description Stereo Record and Playback Mono record, line playback, 48 kHz Mono record, line playback, 8 kHz Stereo record, line playback, ...

  • Page 75

    Bits [13:12] — INML1-INML0 Left Audio ADC Input Multiplexer. These two bits select the analog input for the left channel ADC. The input to the left channel ADC can come from the microphone input, right line input, left line ...

  • Page 76

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 Bits [7:6] — MCLK1-MCLK0 Master Clock Ratio. These two bits select the ratio of the audio master clock frequency to the audio sampling frequency. The ratio can be 256 Fs, 384 ...

  • Page 77

    Bit 15 — ADMUL Left ADC Mute. This bit is used to mute the input to the left channel ADC volume control. The user can set this bit to mute the ADC while retaining the previous gain setting in ...

  • Page 78

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 The DAC volume control register is formatted as follows: Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 MSB DAMU DAVL DAVL5 DAVL4 DAVL3 DAVL DAVL DAVL L 6 Bit ...

  • Page 79

    ANALOG AUDIO BYPASS PATH VOLUME CONTROL REGISTER (Page 02, Address 03h) The bypass path volume control register controls the independent programmable gain amplifiers (PGA's) on the left and right channel analog audio bypass paths of the TSC2301. These bypass ...

  • Page 80

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 Bits [6:0] — BPVR6- BPVR0 Right Channel Audio Bypass Path Volume Control. These 7 bits control the gain setting of the right channel bypass path volume control PGA. This volume control ...

  • Page 81

    Bits [14:12] — KCAM2-KCAM0 Keyclick Amplitude. These bits set the amplitude of the keyclick sound with eight amplitude levels provided. KCAM[2:0] = 100 = Medium amplitude (default) KCAM[2:0] = 111 = Maximum amplitude KCAM[2:0] = 000 = Minimum amplitude ...

  • Page 82

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 Bit 1 — SSRTE Volume Soft-stepping Rate Select. This bit selects the speed of the soft-stepping function of the TSC2301 volume controls. At normal speed, the actual volume is updated approximately ...

  • Page 83

    Bit 11 — MOPD Mono Driver Power Down. This is used to power up (set power down (set to 1) the mono output driver. If only playback of the line or Mic inputs through the mono ...

  • Page 84

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 BCKC 0 1 Bit 3 — SMPD Synchronization Monitor Power Down. This bit turns ON/OFF the I Table 53. Synchronization Monitor Power Down SMPD 0 1 Bit 2 — OTSYN 2 ...

  • Page 85

    Bits 15,14 — RESERVED These bits are reserved and should be written read, they read back as 0. Bits [13:8] — IO5- IO0 GPIO Directional Control. These 6 bits control the direction of the TSC2301s six ...

  • Page 86

    TSC2301 SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004 AUDIO CLOCK CONFIGURATION REGISTER (Page 02, Address 1Bh) This register allows the user to use the output of the crystal oscillator as MCLK, and receive the PLL output on the PENIRQ ...

  • Page 87

    As described earlier, the audio common-mode voltage VCM is derived directly through an internal resistor divider between AVDD and AGND. Therefore, noise that couples onto AVDD/AGND is translated onto VCM and can adversely impact audio performance. The reference pins ...

  • Page 88

    ... Status TSC2301IGQZR ACTIVE BGA MICROSTAR JUNIOR TSC2301IPAG ACTIVE TQFP TSC2301IPAGG4 ACTIVE TQFP TSC2301IPAGR ACTIVE TQFP TSC2301IPAGRG4 ACTIVE TQFP TSC2301IZQZ ACTIVE BGA MICROSTAR JUNIOR TSC2301IZQZR ACTIVE BGA MICROSTAR JUNIOR (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. ...

  • Page 89

    Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or ...

  • Page 90

    TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Type Drawing TSC2301IGQZR BGA MI GQZ CROSTA R JUNI OR TSC2301IPAGR TQFP PAG TSC2301IZQZR BGA MI ZQZ CROSTA R JUNI OR PACKAGE MATERIALS INFORMATION Pins SPQ Reel Reel ...

  • Page 91

    Device Package Type TSC2301IGQZR BGA MICROSTAR JUNIOR TSC2301IPAGR TQFP TSC2301IZQZR BGA MICROSTAR JUNIOR PACKAGE MATERIALS INFORMATION Package Drawing Pins SPQ Length (mm) GQZ 120 2500 PAG 64 1500 ZQZ 120 2500 Pack Materials-Page 2 19-Mar-2008 ...

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    PAG (S-PQFP-G64) 0, 7,50 TYP 10,20 SQ 9,80 12,20 SQ 11,80 1,05 0,95 1,20 MAX NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Falls within JEDEC ...

  • Page 95

    ... Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’ ...