MCP4332-503E/ST

Manufacturer Part NumberMCP4332-503E/ST
DescriptionIC DGTL POT QUAD 50K 14TSSOP
ManufacturerMicrochip Technology
MCP4332-503E/ST datasheet
 

Specifications of MCP4332-503E/ST

Taps129Resistance (ohms)50K
Number Of Circuits4Temperature Coefficient150 ppm/°C Typical
Memory TypeVolatileInterfaceSPI Serial
Voltage - Supply1.8 V ~ 5.5 VOperating Temperature-40°C ~ 125°C
Mounting TypeSurface MountPackage / Case14-TSSOP
Resistance In Ohms50KLead Free Status / RoHS StatusLead free / RoHS Compliant
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Page 60/88

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MCP433X/435X
7.7.2
CONTINUOUS INCREMENTS
Continuous increments are possible only when writing
to the volatile memory registers (address 00h, 01h, 06h
and 07h).
Figure 7-7
shows a continuous increment sequence for
three continuous writes. The writes do not need to be
to the same volatile memory address.
When executing an continuous Increment commands,
the selected wiper will be altered from n to n+1 for each
Increment command received. The wiper value will
increment up to 100h on 8-bit devices and 80h on 7-bit
devices. After the wiper value has reached full scale
(8-bit = 100h, 7-bit = 80h), the wiper value will not be
incremented further. If the wiper register has a value
between 101h and 1FFh, the Increment command is
disabled.
COMMAND BYTE
(INCR COMMAND (n+1))
A
A
A
A
0
1
X
X
SDI
D
D
D
D
3
2
1
0
1
1
1
1
1
1 1* 1
1
1
1
1
1
1
0
0
SDO
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Note 1: Only functions when writing the volatile wiper registers (AD3:AD0) 0h and 1h.
2: Valid Address/Command combination.
3: Invalid Address/Command combination.
4: If an Error Condition occurs (CMDERR = L), all following SDO bits will be low until the CMDERR
condition is cleared (the CS pin is forced to the inactive state).
FIGURE 7-7:
Continuous Increment Command – SDI and SDO States.
DS22242A-page 60
Increment commands can be sent repeatedly without
raising CS until a desired condition is met.
When executing a continuous command string, the
Increment command can be followed by any other valid
command.
The wiper terminal will move after the command has
been received (8th clock).
After the wiper is incremented to the desired position,
the CS pin should be forced to V
unexpected transitions (on the SCK pin do not cause
the wiper setting to change). Driving the CS pin to V
should occur as soon as possible (within device
specifications) after the last desired increment occurs.
COMMAND BYTE
(INCR COMMAND (n+2))
(INCR COMMAND (n+3))
A
A
A
A
0
1
X
X
A
A
D
D
D
D
D
D
3
2
1
0
3
2
1
1
1
1
1
1 1* 1
1
1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
1
1
1
1
1
1
1
1
1
1
to ensure that
IH
IH
COMMAND BYTE
A
A
0
1
X
X
D
D
1
0
1 1* 1 Note 1, 2
1
1
1
0 Note 3, 4
0
0
0
0
0
0 Note 3, 4
0
0
0
0
0
0 Note 3, 4
1
1
1
1
0
 2010 Microchip Technology Inc.