MCP4332-503E/ST

Manufacturer Part NumberMCP4332-503E/ST
DescriptionIC DGTL POT QUAD 50K 14TSSOP
ManufacturerMicrochip Technology
MCP4332-503E/ST datasheet
 


Specifications of MCP4332-503E/ST

Taps129Resistance (ohms)50K
Number Of Circuits4Temperature Coefficient150 ppm/°C Typical
Memory TypeVolatileInterfaceSPI Serial
Voltage - Supply1.8 V ~ 5.5 VOperating Temperature-40°C ~ 125°C
Mounting TypeSurface MountPackage / Case14-TSSOP
Resistance In Ohms50KLead Free Status / RoHS StatusLead free / RoHS Compliant
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MCP433X/435X
8.2
Techniques to Force the CS Pin to
V
IHH
The circuit in
Figure 8-3
shows a method using the
TC1240A doubling charge pump. When the SHDN pin
is high, the TC1240A is off, and the level on the CS pin
®
is controlled by the PIC
microcontrollers (MCUs) IO2
pin.
When the SHDN pin is low, the TC1240A is on and the
V
voltage is 2 * V
. The resistor R
OUT
DD
pin to go higher than the voltage such that the PIC
MCU’s IO2 pin “clamps” at approximately V
TC1240A
C+
®
PIC
MCU
V
IN
C-
SHDN
V
IO1
OUT
R
1
CS
IO2
C
2
FIGURE 8-3:
Using the TC1240A to
Generate the V
Voltage.
IHH
The circuit in
Figure 8-4
shows the method used on the
MCP402X Nonvolatile Digital Potentiometer Evaluation
Board (Part Number: MCP402XEV). This method
requires that the system voltage be approximately 5V.
This ensures that when the PIC10F206 enters a
brown-out condition, there is an insufficient voltage
level on the CS pin to change the stored value of the
wiper.
The
“MCP402X
Nonvolatile
Potentiometer
Evaluation
Board
(DS51546) contains a complete schematic.
GP0 is a general purpose I/O pin, while GP2 can either
be a general purpose I/O pin or it can output the internal
clock.
For the serial commands, configure the GP2 pin as an
input (high-impedance). The output state of the GP0
pin will determine the voltage on the CS pin (V
For high-voltage serial commands, force the GP0
output pin to output a high level (V
) and configure the
OH
GP2 pin to output the internal clock. This will form a
charge pump and increase the voltage on the CS pin
(when the system voltage is approximately 5V).
DS22242A-page 64
PIC10F206
GP0
GP2
allows the CS
1
FIGURE 8-4:
.
DD
Digital Potentiometer Evaluation Board
(MCP402XEV) implementation to generate the
V
voltage.
IHH
C
1
8.3
Using Shutdown Modes
Figure 8-5
shows a possible application circuit where
the
independent
MCP4XXX
Disconnecting the wiper allows the transistor input to
be taken to the bias voltage level (disconnecting A and
or B may be desired to reduce system current).
Disconnecting Terminal A modifies the transistor input
by the R
BW
Disconnecting Terminal B modifies the transistor input
by the R
AW
Common A and Common B connections could be
connected to V
Input
Digital
User’s
Guide”
or V
).
IL
IH
Input
Balance
FIGURE 8-5:
using Terminal Disconnects.
R
1
MCP4XXX
CS
C
C
1
2
MCP4XXX Nonvolatile
terminals
could
be
used.
rheostat value to the Common B.
rheostat value to the Common A. The
and V
.
DD
SS
Common A
A
To base
W
of Transistor
(or Amplifier)
B
Common B
Bias
Example Application Circuit
 2010 Microchip Technology Inc.