MCP4331-502E/ST Microchip Technology, MCP4331-502E/ST Datasheet - Page 49

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MCP4331-502E/ST

Manufacturer Part Number
MCP4331-502E/ST
Description
IC DGTL POT QUAD 5K 20TSSOP
Manufacturer
Microchip Technology
Datasheet

Specifications of MCP4331-502E/ST

Taps
129
Resistance (ohms)
5K
Number Of Circuits
4
Temperature Coefficient
150 ppm/°C Typical
Memory Type
Volatile
Interface
SPI Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Resistance In Ohms
5K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
6.2
The SPI module supports two (of the four) standard SPI
modes. These are Mode 0,0 and 1,1. The mode is
determined by the state of the SDI pin on the rising
edge of the 1st clock bit (of the 8-bit byte).
6.2.1
In Mode 0,0: SCK Idle state = low (V
in on the SDI pin on the rising edge of SCK and clocked
out on the SDO pin on the falling edge of SCK.
FIGURE 6-2:
FIGURE 6-3:
 2010 Microchip Technology Inc.
SCK
Write to
SSPBUF
SDI
Input
Sample
SCK
Write to
SSPBUF
SDI
Input
Sample
CS
SDO
CS
SDO
V
V
The SPI Modes
IH
IH
MODE 0,0
bit15
AD3
bit15 bit14 bit13 bit12
V
V
V
V
IL
IL
IHH
IHH
bit14 bit13 bit12 bit11
AD3
bit15 bit14 bit13 bit12
AD2
bit15 bit14 bit13 bit12 bit11 bit10 bit9
16-Bit Commands (Write, Read) – SPI Waveform (Mode 1,1).
16-Bit Commands (Write, Read) – SPI Waveform (Mode 0,0).
AD2 AD1
AD1
AD0
IL
), data is clocked
AD0
C1
bit10 bit9
C1
C0
bit9
CMDERR bit
C0
X
bit9
bit8
bit8
CMDERR bit
D8
X
bit8
bit7
bit7
bit8
D8
D7
6.2.2
In Mode 1,1: SCK Idle state = high (V
clocked in on the SDI pin on the rising edge of SCK and
clocked out on the SDO pin on the falling edge of SCK.
6.3
Figure 6-2
command waveforms.
read and write commands.
are Increment and Decrement commands. Support of
High Voltage commands allows circuit compatibility
with the corresponding nonvolatile device.
bit7
bit7
bit6
bit6
D7
D6
bit6
bit5
bit5
bit6
D6
D5
SPI Waveforms
through
MODE 1,1
bit5
bit5
bit4
bit4
D5
D4
MCP433X/435X
bit4
bit3
bit4
bit3
D4
D3
Figure 6-5
bit2
bit2
bit3
bit3
Figure 6-2
D3
D2
bit1
bit1
bit2
bit2
Figure 6-4
D1
D2
show the different SPI
bit1
bit1
bit0
bit0
D1
D0
and
DS22242A-page 49
bit0
bit0
and
Figure 6-3
D0
IH
Figure 6-5
), data is
are

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