MCP4351-103E/ST

Manufacturer Part NumberMCP4351-103E/ST
DescriptionIC DGTL POT QUAD 10K 20TSSOP
ManufacturerMicrochip Technology
MCP4351-103E/ST datasheet
 


Specifications of MCP4351-103E/ST

Taps257Resistance (ohms)10K
Number Of Circuits4Temperature Coefficient150 ppm/°C Typical
Memory TypeVolatileInterfaceSPI Serial
Voltage - Supply1.8 V ~ 5.5 VOperating Temperature-40°C ~ 125°C
Mounting TypeSurface MountPackage / Case20-TSSOP
Resistance In Ohms10KLead Free Status / RoHS StatusLead free / RoHS Compliant
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8.4
Design Considerations
In the design of a system with the MCP43XX devices,
the following considerations should be taken into
account:
Power Supply Considerations
Layout Considerations
8.4.1
POWER SUPPLY
CONSIDERATIONS
The typical application will require a bypass capacitor
in order to filter high-frequency noise, which can be
induced onto the power supply’s traces. The bypass
capacitor helps to minimize the effect of these noise
sources on signal integrity.
Figure 8-6
appropriate bypass strategy.
In this example, the recommended bypass capacitor
value is 0.1 µF. This capacitor should be placed as
close (within 4 mm) to the device power pin (V
possible.
The power source supplying these devices should be
as clean as possible. If the application circuit has
separate digital and analog power supplies, V
V
should reside on the analog plane.
SS
0.1 µF
V
DD
0.1 µF
A
U/D
W
CS
B
V
SS
FIGURE 8-6:
Typical Microcontroller
Connections.
 2010 Microchip Technology Inc.
MCP433X/435X
8.4.2
LAYOUT CONSIDERATIONS
Several layout considerations may be applicable to
your application. These may include:
Noise
Footprint Compatibility
PCB Area Requirements
8.4.2.1
Noise
Inductively-coupled AC transients and digital switching
noise can degrade the input and output signal integrity,
potentially masking the MCP43XX’s performance.
Careful board layout minimizes these effects and
increases the Signal-to-Noise Ratio (SNR). Multi-layer
boards utilizing a low-inductance ground plane,
illustrates an
isolated inputs, isolated outputs and proper decoupling
are critical to achieving the performance that the
silicon is capable of providing. Particularly harsh
environments may require shielding of critical signals.
) as
DD
If low noise is desired, breadboards and wire-wrapped
boards are not recommended.
8.4.2.2
Footprint Compatibility
and
DD
The specification of the MCP43XX pinouts was done to
allow systems to be designed to easily support the use
of either the dual (MCP42XX) or quad (MCP43XX)
V
device.
DD
Figure 8-7
shows how the dual pinout devices fit on the
quad device footprint. For the Rheostat devices, the
dual device is in the MSOP package, so the footprints
would need to be offset from each other.
MCP43X1 Quad Potentiometers
1
P3A
P3W
2
3
P3B
4
CS
5
SCK
SDI
6
V
7
SS
8
P1B
P1W
9
10
P1A
TSSOP
MCP43X2 Quad Rheostat
1
P3W
2
P3B
3
CS
V
4
SCK
SS
5
SDI
6
V
SS
7
P1B
TSSOP
Note 1: Pin 15 (RESET) is the Shutdown
(SHDN) pin on the MCP42x1 device.
FIGURE 8-7:
Package) vs. Dual Pinout.
20
P2A
19
P2W
18
P2B
17
V
DD
16
SDO
15
RESET
(1)
MCP42X1 Pinout
14
WP
12
P0B
12
P0W
P0A
11
14
P2W
13
P2B
12
V
DD
11
SDO
10
MCP42X2 Pinout
P0B
9
P0W
8
P1W
Quad Pinout (TSSOP
DS22242A-page 65