MCP4341-103E/ST Microchip Technology, MCP4341-103E/ST Datasheet - Page 35

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MCP4341-103E/ST

Manufacturer Part Number
MCP4341-103E/ST
Description
IC DGTL POT QUAD 10K 20TSSOP
Manufacturer
Microchip Technology
Series
WiperLock™r
Datasheet

Specifications of MCP4341-103E/ST

Memory Type
Non-Volatile
Taps
129
Resistance (ohms)
10K
Number Of Circuits
4
Temperature Coefficient
150 ppm/°C Typical
Interface
SPI Serial
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Resistance In Ohms
10K
End To End Resistance
10kohm
Track Taper
Linear
No. Of Steps
129
Supply Voltage Range
2.7V To 5.5V
Control Interface
Serial, SPI
No. Of Pots
Quad
Rohs Compliant
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
REGISTER 4-1:
© 2009 Microchip Technology Inc.
bit 3
bit 2
bit 1
bit 0
Note 1:
Requires a High Voltage command to modify the state of this bit (for Non-Volatile devices only). This bit is
Not directly written, but reflects the system state (for this feature).
WL1: WiperLock Status bit for Resistor Network 1 (Refer to Section 5.3 “WiperLock™ Technology”
for further information)
The WiperLock Technology bit (WL1) prevents the Volatile and Non-Volatile Wiper 1 addresses and the
TCON0 register bits R1HW, R1A, R1W, and R1B from being written to. High Voltage commands are
required to enable and disable WiperLock Technology.
1 = Wiper and TCON0 register bits R1HW, R1A, R1W, and R1B of Resistor Network 1 (Pot 1) are
0 = Wiper and TCON0 of Resistor Network 1 (Pot 1) can be modified
WL0: WiperLock Status bit for Resistor Network 0 (Refer to Section 5.3 “WiperLock™ Technology”
for further information)
The WiperLock Technology bit (WL0) prevents the Volatile and Non-Volatile Wiper 0 addresses and the
TCON0 register bits R0HW, R0A, R0W, and R0B from being written to. High Voltage commands are
required to enable and disable WiperLock Technology.
1 = Wiper and TCON0 register bits R0HW, R0A, R0W, and R0B of Resistor Network 0 (Pot 0) are
0 = Wiper and TCON0 of Resistor Network 0 (Pot 0) can be modified
Reserved: Forced to “1”
WP: EEPROM Write Protect Status bit (Refer to Section “EEPROM Write Protect” for further
information)
This bit indicates the status of the write protection on the EEPROM memory. When Write Protect is
enabled, writes to all non-volatile memory are prevented. This includes the General Purpose EEPROM
memory, and the non-volatile Wiper registers. Write Protect does not block modification of the volatile
wiper register values or the volatile TCON0 and TCON1 register values (via Increment, Decrement, or
Write commands).
This status bit is an OR of the devices Write Protect pin (WP) and the internal non-volatile WP bit. High
Voltage commands are required to enable and disable the internal WP EEPROM bit.
1 = EEPROM memory is Write Protected
0 = EEPROM memory can be written
Note:
Note:
“Locked” (Write Protected)
“Locked” (Write Protected)
STATUS REGISTER (CONTINUED)
The WL1 bit always reflects the result of the last programming cycle to the non-volatile WL1
bit. After a POR/BOR or RESET pin event, the WL1 bit is loaded with the non-volatile WL1
bit value.
The WL0 bit always reflects the result of the last programming cycle to the non-volatile WL0
bit. After a POR/BOR or RESET pin event, the WL0 bit is loaded with the non-volatile WL0
bit value.
MCP434X/436X
DS22233A-page 35

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