AD5232BRU50-REEL7

Manufacturer Part NumberAD5232BRU50-REEL7
DescriptionIC DGTL POT DUAL 256POS 16-TSSOP
ManufacturerAnalog Devices Inc
AD5232BRU50-REEL7 datasheet
 

Specifications of AD5232BRU50-REEL7

Rohs StatusRoHS non-compliantTaps256
Resistance (ohms)50KNumber Of Circuits2
Temperature Coefficient600 ppm/°C TypicalMemory TypeNon-Volatile
Interface4-Wire SPI SerialVoltage - Supply2.7 V ~ 5.5 V, ±2.25 V ~ 2.75 V
Operating Temperature-40°C ~ 85°CMounting TypeSurface Mount
Package / Case16-TSSOPResistance In Ohms50K
Number Of Elements2# Of Taps256
Resistance (max)50KOhmPower Supply RequirementSingle/Dual
Interface TypeSerial (4-Wire/SPI)Single Supply Voltage (typ)3/5V
Dual Supply Voltage (typ)±2.5VSingle Supply Voltage (min)2.7V
Single Supply Voltage (max)5.5VDual Supply Voltage (min)±2.25V
Dual Supply Voltage (max)±2.75VOperating Temp Range-40C to 85C
Operating Temperature ClassificationIndustrialMountingSurface Mount
Pin Count16For Use WithEVAL-AD5232-10EBZ - BOARD EVALUATION FOR AD5232-10
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AD5232
USING ADDITIONAL INTERNAL, NONVOLATILE
EEMEM
The AD5232 contains additional internal user storage registers
(EEMEM) for saving constants and other 8-bit data. Table 9
provides an address map of the internal nonvolatile storage
registers, which are shown in the functional block diagram as
EEMEM1, EEMEM2, and bytes of USER EEMEM.
Note the following about EEMEM function:
RDAC data stored in EEMEM locations are transferred to
their corresponding RDACx register at power-on or when
Command Instruction 1 and Command Instruction 8 are
executed.
USERx refers to internal nonvolatile EEMEM registers that are
available to store and retrieve constants by using Command
Instruction 3 and Command Instruction 9, respectively.
The EEMEM locations are one byte each (eight bits).
Execution of Command Instruction 1 leaves the device in
the read mode power consumption state. When the final
Command Instruction 1 is executed, the user should perform
an NOP (Command Instruction 0) to return the device to
the low power idle state.
Table 9. EEMEM Address Map
EEMEM Address
EEMEM Contents of Each Device
(ADDR)
EEMEM (ADDR)
0000
RDAC1
0001
RDAC2
0010
USER 1
0011
USER 2
0100
USER 3
0101
USER 4
***
***
1111
USER 14
TERMINAL VOLTAGE OPERATING RANGE
The positive V
and negative V
power supply of the digital
DD
SS
potentiometer defines the boundary conditions for proper
3-terminal programmable resistance operations. Signals present
on Terminal A, Terminal B, and Wiper Terminal W that exceed
V
or V
are clamped by a forward biased diode (see Figure 39).
DD
SS
The ground pin of the AD5232 device is used primarily as
a digital ground reference that needs to be tied to the common
ground of the PCB. The digital input logic signals to the AD5232
must be referenced to the ground (GND) pin of the device and
satisfy the minimum input logic high level and the maximum
input logic low level that are defined in the Specifications section.
An internal level shift circuit between the digital interface and
the wiper switch control ensures that the common-mode voltage
range of the three terminals, Terminal A, Terminal B, and
Wiper Terminal W, extends from V
to V
SS
Table 10. RDAC and Digital Register Address Map
Register Address (ADDR)
0000
0001
1
The RDACx registers contain data that determines the position of the
variable resistor wiper.
DETAILED POTENTIOMETER OPERATION
The actual structure of the RDACx is designed to emulate the
performance of a mechanical potentiometer. The RDACx contains
multiple strings of connected resistor segments, with an array of
analog switches that act as the wiper connection to several points
along the resistor array. The number of points is equal to the
resolution of the device. For example, the AD5232 has 256 con-
nection points, allowing it to provide better than 0.5% setability
resolution. Figure 40 provides an equivalent diagram of the con-
nections between the three terminals that make up one channel of
the RDACx. The SW
only one of the SW(0) to SW(2
depending on the resistance step decoded from the data bits. The
resistance contributed by R
resistance.
.
DD
Rev. A | Page 18 of 24
Figure 39. Maximum Terminal Voltages Set by V
Name of Register
RDAC1
RDAC2
and SW
switches are always on, whereas
A
B
N
–1) switches is on at a time,
must be accounted for in the output
W
SW
A
A
N –
SW(2
1)
W
R
RDAC
S
N –
SW(2
2)
WIPER
REGISTER
AND
DECODER
R
SW(1)
S
R
S
SW(2)
N
R
= R
/2
S
AB
SW
B
B
NOTES
1. DIGITAL CIRCUITRY
OMITTED FOR CLARITY
Figure 40. Equivalent RDAC Structure
V
DD
A
W
B
V
SS
and V
DD
SS
1