AD5231BRU10 Analog Devices Inc, AD5231BRU10 Datasheet - Page 22

• Manufacturer Part Number: AD5231BRU10
• Description: IC DGTL POT 1024POS 16-TSSOP
• Manufacturer: Analog Devices Inc

Specifications of AD5231BRU10

• Rohs Status: RoHS non-compliant
• Taps: 1024
• Resistance (ohms): 10K
• Number Of Circuits: 1
• Temperature Coefficient: 600 ppm/°C Typical
• Memory Type: Non-Volatile
• Interface: 4-Wire SPI Serial
• Voltage - Supply: 2.7 V ~ 5.5 V, ±2.25 V ~ 2.75 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP
• Resistance In Ohms: 10K
• End To End Resistance: 10kohm
• Track Taper: Logarithmic
• Resistance Tolerance: +20, -40%
• No. Of Steps: 1024
• Supply Voltage Range: 2.7V To 5.5V, ± 2.25V To ± 2.75V
• Control Interface: Serial, SPI
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

AD5231
FLASH/EEMEM RELIABILITY
The Flash/EE memory array on the AD5231 is fully qualified
for two key Flash/EE memory characteristics, namely Flash/EE
memory cycling endurance and Flash/EE memory data
retention.
Endurance quantifies the ability of the Flash/EE memory to be
cycled through many program, read, and erase cycles. In real
terms, a single endurance cycle is composed of four
independent, sequential events. These events are defined as
•
•
•
•
During reliability qualification, Flash/EE memory is cycled
from 0x000 to 0x3FF until a first fail is recorded signifying the
endurance limit of the on-chip Flash/EE memory.
As indicated in the Specifications section, the AD5231 Flash/EE
memory endurance qualification has been carried out in
accordance with JEDEC Specification A117 over the industrial
temperature range of −40°C to +85°C. The results allow the
specification of a minimum endurance figure over supply and
temperature of 100,000 cycles, with an endurance figure of
700,000 cycles being typical of operation at 25°C.
Retention quantifies the ability of the Flash/EE memory to
retain its programmed data over time. Again, the AD5231 has
been qualified in accordance with the formal JEDEC Retention
Initial page erase sequence
Read/verify sequence
Byte program sequence
Second read/verify sequence
Rev. C | Page 22 of 28
Lifetime Specification (A117) at a specific junction temperature
(T
Flash/EE memory is cycled to its specified endurance limit,
described previously, before data retention is characterized.
This means that the Flash/EE memory is guaranteed to retain
its data for its full specified retention lifetime every time the
Flash/EE memory is reprogrammed. It should also be noted
that retention lifetime, based on an activation energy of 0.6 eV,
derates with T
retained for 100 years at 55°C operation, but reduces to 15 years
at 85°C operation. Beyond these limits, the part must be
reprogrammed so that the data can be restored.
J
= 55°C). As part of this qualification procedure, the
300
250
200
150
100
50
0
40
Figure 45. Flash/EE Memory Data Retention
J
, as shown in Figure 45. For example, the data is
50
T
J
60
ANALOG DEVICES
TYPICAL PERFORMANCE
AT T
JUNCTION TEMPERATURE (°C)
J
= 55°C
70
80
90
100
110