AD5232BRU10 Analog Devices Inc, AD5232BRU10 Datasheet - Page 6

• Manufacturer Part Number: AD5232BRU10
• Description: IC DGTL POT DUAL 256POS 16-TSSOP
• Manufacturer: Analog Devices Inc

Specifications of AD5232BRU10

• Rohs Status: RoHS non-compliant
• Taps: 256
• Resistance (ohms): 10K
• Number Of Circuits: 2
• Temperature Coefficient: 600 ppm/°C Typical
• Memory Type: Non-Volatile
• Interface: 4-Wire SPI Serial
• Voltage - Supply: 2.7 V ~ 5.5 V, ±2.25 V ~ 2.75 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP
• Resistance In Ohms: 10K
• End To End Resistance: 10kohm
• Track Taper: Linear / Logarithmic
• Resistance Tolerance: +20, -40%
• No. Of Steps: 256
• Supply Voltage Range: 2.7V To 5.5V, ± 2.25V To ± 2.75V
• Number Of Elements: 2
• # Of Taps: 256
• Resistance (max): 10KOhm
• Power Supply Requirement: Single/Dual
• Interface Type: Serial (4-Wire/SPI)
• Single Supply Voltage (typ): 3/5V
• Dual Supply Voltage (typ): ±2.5V
• Single Supply Voltage (min): 2.7V
• Single Supply Voltage (max): 5.5V
• Dual Supply Voltage (min): ±2.25V
• Dual Supply Voltage (max): ±2.75V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 16
• Package Type: TSSOP
• For Use With: EVAL-AD5232-10EBZ - BOARD EVALUATION FOR AD5232-10
• Lead Free Status / Rohs Status: Not Compliant

AD5232
Timing Diagrams
CPOL = 1
CPOL = 0
SDO
NOTES
1. B24 IS AN EXTRA BIT THAT IS NOT DEFINED, BUT IT IS USUALLY THE LSB OF THE CHARACTER THAT WAS PREVIOUSLY TRANSMITTED.
2. THE CPOL = 1 MICROCONTROLLER COMMAND ALIGNS THE INCOMING DATA TO THE POSITIVE EDGE OF THE CLOCK.
CLK
RDY
SDI
CS
SDO
CLK
NOTES
1. THIS EXTRA BIT IS NOT DEFINED, BUT IT IS USUALLY THE MSB OF THE CHARACTER THAT WAS JUST RECEIVED.
2. THE CPOL = 0 MICROCONTROLLER COMMAND ALIGNS THE INCOMING DATA TO THE POSITIVE EDGE OF THE CLOCK.
RDY
SDI
CS
HIGH
OR LOW
HIGH
OR LOW
t
14
t
14
t
8
t
8
t
2
t
2
B16*
(MSB)
(MSB IN)
B15
(MSB OUT)
B15
B15
t
5
B15
(MSB)
t
B15
4
t
(MSB)
1
B15
t
1
B15
t
t
10
4
t
5
t
6
t
t
7
6
CPHA = 1
t
10
Figure 2. CPHA = 1
Figure 3. CPHA = 0
Rev. A | Page 6 of 24
t
7
CPHA = 0
t
11
(LSB)
B0
(LSB)
B0
t
11
(LSB)
B0
B0
(LSB)
B0
B0
(LSB)
B0
t
3
t
3
*
t
t
15
9
t
t
15
9
t
12
t
17
t
12
t
17
t
16
t
t
13
16
HIGH
OR LOW
t
13
HIGH
OR LOW