IC XDCP SGL 64-TAP 10K 16-SOIC

 

X9429WS16IZT1

Manufacturer Part NumberX9429WS16IZT1
DescriptionIC XDCP SGL 64-TAP 10K 16-SOIC
ManufacturerIntersil
SeriesXDCP™
X9429WS16IZT1 datasheets

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Specifications of X9429WS16IZT1

Taps64Resistance (ohms)10K
Number Of Circuits1Temperature Coefficient300 ppm/°C Typical
Memory TypeNon-VolatileInterfaceI²C, 2-Wire Serial
Voltage - Supply4.5 V ~ 5.5 VOperating Temperature-40°C ~ 85°C
Mounting TypeSurface MountPackage / Case16-SOIC (0.300", 7.5mm Width)
Resistance In Ohms10KLead Free Status / RoHS StatusLead free / RoHS Compliant
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Data Sheet
Single Digitally Controlled Potentiometer
(XDCP™)
The X9429 integrates a single digitally controlled
potentiometer (XDCP) on a monolithic CMOS integrated
circuit.
The digital controlled potentiometer is implemented using 63
resistive elements in a series array. Between each element
are tap points connected to the wiper terminal through
switches. The position of the wiper on the array is controlled
by the user through the 2-wire bus interface. The
potentiometer has associated with it a volatile Wiper Counter
Register (WCR) and a four non-volatile Data Registers that
can be directly written to and read by the user. The contents
of the WCR controls the position of the wiper on the resistor
array though the switches. Power-up recalls the contents of
the default data register (DR0) to the WCR.
The XDCP can be used as a three-terminal potentiometer or
as a two terminal variable resistor in a wide variety of
applications including control, parameter adjustments, and
signal processing.
Block Diagram
ADDRESS
DATA
STATUS
2-WIRE
BUS
INTERFACE
1
October 13, 2008
Features
• Single Voltage Potentiometer
• 64 Resistor Taps
• 2-wire Serial Interface for Write, Read, and Transfer
Operations of the Potentiometer
• Wiper Resistance, 150W Typical at 5V
• Non-Volatile Storage of Multiple Wiper Positions
• Power-on Recall. Loads Saved Wiper Position on Power-up.
• Standby Current < 3µA Max
• V
: 2.7V to 5.5V Operation
CC
• 2.5kW, 10kW Total Pot Resistance
• Endurance: 100,000 Data Changes per Bit per Register
• 100 yr. Data Retention
• 14 Ld TSSOP, 16 Ld SOIC
• Low Power CMOS
• Pb-free available (RoHS compliant)
V
CC
WRITE
READ
TRANSFER
POWER-ON RECALL
INC/DEC
BUS
WIPER COUNTER
INTERFACE
REGISTER (WCR)
AND
CONTROL
DATA REGISTERS
4 BYTES
CONTROL
V
SS
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2008. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
X9429
Low Noise/Low Power/2-Wire Bus
FN8248.3
V
/R
H
H
10kΩ
64-TAPS
WIPER
POT
V
/R
V
/R
L
L
W
W
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.

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X9429WS16IZT1 Summary of contents

  • Page 1

    ... SS CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2008. All Rights Reserved All other trademarks mentioned are the property of their respective owners. X9429 Low Noise/Low Power/2-Wire Bus FN8248 ...

  • Page 2

    ... NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. ...

  • Page 3

    Detailed Functional Diagram V CC SCL INTERFACE SDA AND A3 CONTROL CIRCUITRY Circuit Level Applications • Vary the Gain of a Voltage Amplifier • Provide Programmable DC Reference Voltages for Comparators and Detectors • Control ...

  • Page 4

    Pinouts X9429 (14 LD TSSOP) TOP VIEW X9429 10 SCL SDA 8 7 VSS Pin Assignments TSSOP PIN SOIC PIN 12, 3, ...

  • Page 5

    The device controlling the transfer is a master and the device being controlled is the slave. The master will always initiate data transfers and provide the clock for both ...

  • Page 6

    Four of the seven instructions end with the transmission of the instruction byte. The basic sequence is illustrated in Figure 3. These two-byte instructions exchange data between the Wiper Counter Register and one of the Data Registers. A transfer from ...

  • Page 7

    INSTRUCTION Read Wiper Counter Register 1 0 Write Wiper Counter Register 1 0 Read Data Register 1 0 Write Data Register 1 1 XFR Data Register to Wiper 1 1 Counter Register XFR Wiper Counter 1 ...

  • Page 8

    INC/DEC CMD ISSUED SCL SDA FIGURE 6. INCREMENT/DECREMENT TIMING LIMITS SCL FROM MASTER DATA OUTPUT FROM TRANSMITTER DATA OUTPUT FROM RECEIVER START FIGURE 7. ACKNOWLEDGE RESPONSE FROM RECEIVER 8 X9429 VOLTAGE OUT 1 T WRID 8 ...

  • Page 9

    SERIAL DATA PATH FROM INTERFACE CIRCUITRY REGISTER 0 REGISTER 2 IF WCR = 00[H] THEN WCR = 3F[H] THEN FIGURE 8. ...

  • Page 10

    ONE 6-BIT WIPER COUNTER REGISTER FOR EACH XDCP. {D5~D0}: These bits specify the wiper position of the respective XDCP. The Wiper Counter Register is loaded on Instruction Format NOTES: 1. “MACK”/”SACK”: stands for the acknowledge sent by the master/slave. 2. ...

  • Page 11

    XFR Data Register (DR) to Wiper Counter Register (WCR) DEVICE S TYPE DEVICE INSTRUCTION T S IDENTIFIER ADDRESSES XFR Wiper Counter Register ...

  • Page 12

    ... Thermal Resistance (Typical, Note 1) 14 Lead TSSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Lead SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Temperature Under Bias . . . . . . . . . . . . . . . . . . . . .-65°C to +135°C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Pb-Free Reflow Profile .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Operating Conditions Temperature Range Commercial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C Industrial .-40°C to +85°C TEST CONDITIONS +25° ...

  • Page 13

    SYMBOL PARAMETER I Output Leakage Current LO V Input HIGH Voltage IH V Input LOW Voltage IL V Output LOW voltage OL ENDURANCE AND DATA RETENTION PARAMETER Minimum Endurance Data Retention CAPACITANCE SYMBOL C (Note 5) Input/output capacitance (SDA) I/O ...

  • Page 14

    AC TIMING (Over recommended operating conditions) SYMBOL f Clock Frequency SCL t Clock Cycle Time CYC t Clock High Time HIGH t Clock Low Time LOW t Start Setup Time SU:STA t Start Hold Time HD:STA t Stop Setup Time ...

  • Page 15

    Timing Diagrams Start and Stop Timing (START) SCL t SU:STA SDA Input Timing t CYC SCL SDA t SU:DAT Output Timing SCL SDA XDCP Timing (for All Load Instructions) SCL SDA X9429 ...

  • Page 16

    XDCP Timing (for Increment/Decrement Instruction) SCL SDA WIPER REGISTER ADDRESS Write Protect and Device Address Pins Timing SCL SDA WP A0, A2, A3 Applications information Basic Configurations of Electronic Potentiometers V R THREE TERMINAL POTENTIOMETER; VARIABLE ...

  • Page 17

    Application Circuits NONINVERTING AMPLIFIER – (1 OFFSET VOLTAGE ADJUSTMENT – 100kΩ + TL072 10kΩ 10kΩ 10kΩ +5V 17 X9429 ...

  • Page 18

    Application Circuits (continued) ATTENUATOR – All -1/2 ≤ G ≤ +1/2 INVERTING AMPLIFIER – ...

  • Page 19

    Thin Shrink Small Outline Plastic Packages (TSSOP) N INDEX 0.25(0.010) E AREA E1 - 0.05(0.002) SEATING PLANE - -C- α 0.10(0.004) 0.10(0.004 NOTES: 1. These package ...

  • Page 20

    ... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

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