PIC10F220-E/OT Microchip Technology, PIC10F220-E/OT Datasheet - Page 17

384B Flash, 16B RAM, 4 I/O, 8bit ADC 6 SOT-23 BAG

PIC10F220-E/OT

Manufacturer Part Number
PIC10F220-E/OT
Description
384B Flash, 16B RAM, 4 I/O, 8bit ADC 6 SOT-23 BAG
Manufacturer
Microchip Technology
Series
PIC® 10Fr
Datasheet

Specifications of PIC10F220-E/OT

Processor Series
PIC10F
Core
RISC
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
256 B
Data Ram Size
16 B
Interface Type
RS-232, USB
Maximum Clock Frequency
8 MHZ
Number Of Programmable I/os
4
Number Of Timers
1
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SOT-23-6
Operating Temperature Range
- 40 C to + 125 C
Processor To Be Evaluated
PIC10F220
Supply Current (max)
100 nA
Core Processor
PIC
Core Size
8-Bit
Speed
8MHz
Connectivity
-
Peripherals
POR, WDT
Number Of I /o
4
Eeprom Size
-
Ram Size
16 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
 Details
TABLE 4-1:
4.4
This register contains the arithmetic status of the ALU,
the Reset status and the page preselect bit.
The STATUS register can be the destination for any
instruction, as with any other register. If the STATUS
register is the destination for an instruction that affects
the Z, DC or C bits, then the write to these three bits is
disabled. These bits are set or cleared according to the
device logic. Furthermore, the TO and PD bits are not
writable. Therefore, the result of an instruction with the
STATUS register as destination may be different than
intended.
For example, CLRF STATUS will clear the upper three
bits and set the Z bit. This leaves the STATUS register
as 000u u1uu (where u = unchanged).
Therefore, it is recommended that only BCF, BSF and
MOVWF instructions be used to alter the STATUS regis-
ter. These instructions do not affect the Z, DC or C bits
from the STATUS register. For other instructions, which
do affect Status bits, see Instruction Set Summary.
© 2007 Microchip Technology Inc.
00h
01h
02h
03h
04h
05h
06h
07h
08h
N/A
N/A
Legend:
Note 1:
Address
2:
3:
STATUS Register
INDF
TMR0
PCL
STATUS
FSR
OSCCAL
GPIO
ADCON0
ADRES
TRISGPIO
OPTION
– = unimplemented, read as ‘0’, x = unknown, u = unchanged, q = value depends on condition.
The upper byte of the Program Counter is not directly accessible. See Section 4.7 “Program Counter” for an
explanation of how to access these bits.
Other (non Power-up) Resets include external Reset through MCLR, Watchdog Timer and wake-up on pin change
Reset.
See Table 8-1 for other Reset specific values.
Name
(1)
SPECIAL FUNCTION REGISTER (SFR) SUMMARY
Uses contents of FSR to address data memory (not a physical register)
8-Bit Real-Time Clock/Counter
Low Order 8 Bits of PC
Indirect Data Memory Address Pointer
Result of Analog-to-Digital Conversion
GPWUF
GPWU
ANS1
CAL6
Bit 7
GPPU
CAL5
ANS0
Bit 6
CAL4
T0CS
Bit 5
CAL3
T0SE
Bit 4
TO
I/O Control Register
CHS1
CAL2
Bit 3
GP3
PSA
PD
CHS0
CAL1
Bit 2
GP2
PS2
Z
GO/DONE
CAL0
Bit 1
GP1
PS1
DC
PIC10F220/222
FOSC4
ADON
Bit 0
GP0
PS0
C
0--1 1xxx
xxxx xxxx
xxxx xxxx
1111 1111
111x xxxx
1111 1110
---- xxxx
11-- 1100
xxxx xxxx
---- 1111
1111 1111
Power-On
Value on
Reset
DS41270E-page 15
(2)
(3)
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