PIC10F220-E/OT Microchip Technology, PIC10F220-E/OT Datasheet - Page 41

384B Flash, 16B RAM, 4 I/O, 8bit ADC 6 SOT-23 BAG

PIC10F220-E/OT

Manufacturer Part Number
PIC10F220-E/OT
Description
384B Flash, 16B RAM, 4 I/O, 8bit ADC 6 SOT-23 BAG
Manufacturer
Microchip Technology
Series
PIC® 10Fr
Datasheet

Specifications of PIC10F220-E/OT

Processor Series
PIC10F
Core
RISC
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
256 B
Data Ram Size
16 B
Interface Type
RS-232, USB
Maximum Clock Frequency
8 MHZ
Number Of Programmable I/os
4
Number Of Timers
1
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SOT-23-6
Operating Temperature Range
- 40 C to + 125 C
Processor To Be Evaluated
PIC10F220
Supply Current (max)
100 nA
Core Processor
PIC
Core Size
8-Bit
Speed
8MHz
Connectivity
-
Peripherals
POR, WDT
Number Of I /o
4
Eeprom Size
-
Ram Size
16 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
 Details
FIGURE 8-6:
TABLE 8-4:
8.7
The TO, PD and GPWUF bits in the STATUS register
can be tested to determine if a Reset condition has
been caused by a Power-up condition, a MCLR,
Watchdog Timer (WDT) Reset or wake-up on pin
change.
TABLE 8-5:
© 2007 Microchip Technology Inc.
N/A
Legend: Shaded boxes = Not used by Watchdog Timer, – = unimplemented, read as ‘0’, u = unchanged.
Legend: u = unchanged, x = unknown, – = unimplemented bit, read as ‘0’, q = value depends on condition.
Note 1:
Address
Note 1: T0CS, T0SE, PSA, PS<2:0> are bits in the OPTION register.
GPWUF
Time-out Sequence, Power-down
and Wake-up from Sleep Status
Bits (TO/PD/GPWUF/CWUF)
0
0
0
0
0
1
The TO, PD and GPWUF bits maintain their status (u) until a Reset occurs. A low-pulse on the MCLR
input does not change the TO, PD or GPWUF Status bits.
OPTION
Name
Configuration
SUMMARY OF REGISTERS ASSOCIATED WITH THE WATCHDOG TIMER
TO/PD/GPWUF STATUS AFTER RESET
WDT Enable
Watchdog
Timer
WATCHDOG TIMER BLOCK DIAGRAM
Bit
From Timer0 Clock Source
GPWU
Bit 7
TO
0
0
1
1
u
1
(Figure 6-5)
GPPU T0CS
Bit 6
PD
0
1
0
u
0
1
u
0
Bit 5
PSA
M
U
X
T0SE
Bit 4
WDT wake-up from Sleep
WDT time-out (not from Sleep)
MCLR wake-up from Sleep
Power-up
MCLR not during Sleep
Wake-up from Sleep on pin change
Bit 3
PSA
WDT Time-out
0
MUX
8-to-1 MUX
Postscaler
Bit 2
Postscaler
PS2
1
Bit 1 Bit 0
PS1
Reset Caused By
PIC10F220/222
PSA
PS0
To Timer0
3
PS<2:0>
1111 1111
Power-On
Value on
Reset
(Figure 6-4)
DS41270E-page 39
1111 1111
Value on
All Other
Resets

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