MCP4728-E/UN Microchip Technology, MCP4728-E/UN Datasheet

IC DAC 12BIT W/I2C 10-MSOP

MCP4728-E/UN

Manufacturer Part Number
MCP4728-E/UN
Description
IC DAC 12BIT W/I2C 10-MSOP
Manufacturer
Microchip Technology
Datasheets

Specifications of MCP4728-E/UN

Number Of Converters
4
Settling Time
6µs
Package / Case
10-MSOP, Micro10™, 10-uMAX, 10-uSOP
Number Of Bits
12
Data Interface
I²C
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Number Of Dac Outputs
4
Resolution
12 bit
Interface Type
I2C
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.7 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Supply Current
110 mA
Voltage Reference
2.048 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MCP4728EV - BOARD EVAL 12BIT 4CH DAC MCP4728
Power Dissipation (max)
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCP4728-E/UN
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
MCP4728-E/UN
0
Features
• 12-Bit Voltage Output DAC with Four Buffered
• On-Board Nonvolatile Memory (EEPROM) for
• Internal or External Voltage Reference Selection
• Output Voltage Range:
• ±0.2 Least Significant Bit (LSB) Differential
• Fast Settling Time: 6 µs (typical)
• Normal or Power-Down Mode
• Low Power Consumption
• Single-Supply Operation: 2.7V to 5.5V
• I
• 10-Lead MSOP Package
• Extended Temperature Range: -40°C to +125°C
Applications
• Set Point or Offset Adjustment
• Sensor Calibration
• Closed-Loop Servo Control
• Low Power Portable Instrumentation
• PC Peripherals
• Programmable Voltage and Current Source
• Industrial Process Control
• Instrumentation
• Bias Voltage Adjustment for Power Amplifiers
© 2010 Microchip Technology Inc.
12-Bit, Quad Digital-to-Analog Converter with EEPROM Memory
Outputs
DAC Codes and I
- Using Internal V
- Using External V
Nonlinearity (DNL) (typical)
- Address bits: User Programmable to
- Standard (100 kbps), Fast (400 kbps) and
2
C Interface:
0.000V to 2.048V with Gain Setting = 1
0.000V to 4.096V with Gain Setting = 2
0.000V to V
EEPROM
High Speed (HS) Mode (3.4 Mbps)
DD
2
REF
C™ Address Bits
REF
(2.048V):
(V
DD
):
Description
The MCP4728 device is a quad, 12-bit voltage output
Digital-to-Analog Convertor (DAC) with nonvolatile
memory (EEPROM). Its on-board precision output
amplifier allows it to achieve rail-to-rail analog output
swing.
The DAC input codes, device configuration bits, and
I
memory (EEPROM) by using I
commands. The nonvolatile memory feature enables
the DAC device to hold the DAC input codes during
power-off time, allowing the DAC outputs to be
available immediately after power-up with the saved
settings. This feature is very useful when the DAC
device is used as a supporting device for other devices
in the application’s network.
The MCP4728 device has a high precision internal
voltage reference (V
the internal reference or external reference (V
each channel individually.
Each channel can be operated in Normal mode or
Power-Down
configuration register bits. In Power-Down mode, most
of the internal circuits in the powered down channel are
turned off for power savings, and the output amplifier
can be configured to present a known low, medium, or
high resistance output load.
The MCP4728 device includes a Power-on Reset
(POR) circuit to ensure reliable power-up and an
on-board charge pump for the EEPROM programming
voltage.
The MCP4728 has a two-wire I
interface for standard (100 kHz), fast (400 kHz), or high
speed (3.4 MHz) mode.
The MCP4728 DAC is an ideal device for applications
requiring design simplicity with high precision, and for
applications requiring the DAC device settings to be
saved during power-off time.
The MCP4728 device is available in a 10-lead MSOP
package and operates from a single 2.7V to 5.5V
supply voltage.
2
C address bits are programmable to the nonvolatile
MCP4728
mode
REF
individually
= 2.048V). The user can select
2
C compatible serial
2
C serial interface
by
DS22187E-page 1
setting
DD
) for
the

Related parts for MCP4728-E/UN

MCP4728-E/UN Summary of contents

Page 1

... The MCP4728 DAC is an ideal device for applications requiring design simplicity with high precision, and for applications requiring the DAC device settings to be saved during power-off time. The MCP4728 device is available in a 10-lead MSOP package and operates from a single 2.7V to 5.5V supply voltage. ) for ...

Page 2

... MCP4728 Package Type Functional Block Diagram EEPROM INPUT V REGISTER A SS EEPROM B INPUT REGISTER B SDA EEPROM C SCL INPUT REGISTER C EEPROM D INPUT RDY/BSY REGISTER D Internal V REF (2.048V) DS22187E-page 2 MCP4728 MSOP SCL 2 OUT SDA 3 OUT 7 LDAC OUT RDY/BSY OUT LDAC V A UDAC REF Gain ...

Page 3

... 5.5V. REF command to the beginning of V MCP4728 = +2.7V to 5.5V 0V SS. Conditions 5.5V REF DD DD All 4 channels are in Normal mode. 3 channels are in Normal mode, 1 channel is powered down. 2 channels are in Normal mode, 2 channel are powered down ...

Page 4

... MCP4728 ELECTRICAL CHARACTERISTICS (CONTINUED) Electrical Specifications: Unless otherwise indicated, all parameters apply kΩ 100 pF -40°C to +125°C. Typical values are at +25° Parameter Symbol Power-on Reset V POR Threshold Voltage Power-Up Ramp Rate V RAMP DC Accuracy Resolution n Integral Nonlinearity (INL) INL Error ...

Page 5

... Infinite — hours Ω — 1 — — 1 — kΩ — 100 — kΩ — 500 — kΩ over time 5.5V. REF command to the beginning of V MCP4728 = +2.7V to 5.5V 0V SS. Conditions Note REF DD FSR = from 0. Internal REF x FSR = from 0 REF V = Internal REF x FSR = from 0 ...

Page 6

... MCP4728 ELECTRICAL CHARACTERISTICS (CONTINUED) Electrical Specifications: Unless otherwise indicated, all parameters apply kΩ 100 pF -40°C to +125°C. Typical values are at +25° Parameter Symbol Dynamic Performance (Note 4) Major Code Transition Glitch Digital Feedthrough Analog Crosstalk DAC-to-DAC Crosstalk Digital Interface Output Low Voltage ...

Page 7

... SU:STA T LOW T SDA HD:STA FSDA 2 FIGURE 1- Bus Timing Data. LDAC V (UDAC = 1) OUT FIGURE 1-2: LDAC Pin Timing vs. V © 2010 Microchip Technology Inc. T HIGH T SU:DAT T HD:DAT LDAC 0. Update Update. OUT MCP4728 T RSCL T SU:STO T BUF 0. RSDA Update DS22187E-page 7 ...

Page 8

... MCP4728 SERIAL TIMING SPECIFICATIONS Electrical Specifications: Unless otherwise specified, all limits are specified for T Standard and Fast Mode: V High Speed Mode: V Parameters Sym Clock Frequency f SCL Bus Capacitive Loading Cb Start Condition Setup Time T SU:STA (Start, Repeated Start) Start Condition Hold Time ...

Page 9

... Clock Low time (T SU:DAT . specification. This specification is equivalent to the Data Hold Time ( = HD:DAT FSDA RSDA MCP4728 = -40 to +125° 0V Units Conditions ns Standard Mode ns Fast Mode ns High Speed Mode 1.7 ns High Speed Mode 1.7 (Note 2) ns High Speed Mode 3.4 ns High Speed Mode 3 ...

Page 10

... MCP4728 SERIAL TIMING SPECIFICATIONS (CONTINUED) Electrical Specifications: Unless otherwise specified, all limits are specified for T Standard and Fast Mode: V High Speed Mode: V Parameters Sym Bus Free Time T BUF (Note 5) Input Filter T SP Spike Suppression (SDA and SCL) (Not Tested) Note 1: This parameter is ensured by characterization and is not 100% tested. ...

Page 11

... FIGURE 2- 0 REF DD 0.15 0.1 0.05 0 -0.05 -0.1 4096 0 = +25°C FIGURE 2- MCP4728 = 5 kΩ 100 pF 5.5V Internal, Gain = x1 DD REF 1024 2048 3072 4096 Code DNL vs. Code (T = +25° 5.5V Internal, Gain = x2 DD REF 1024 ...

Page 12

... MCP4728 Note: Unless otherwise indicated -40°C to +125° 2.7V Internal, Gain = x1 DD REF 1024 2048 3072 Code FIGURE 2-7: INL vs. Code ( 2.7V 1024 2048 3072 Code FIGURE 2-8: INL vs. Code ( 5.5V Internal, Gain = x1 DD REF 4 +85° +125 C -8 -10 0 1024 ...

Page 13

... C -0.3 4096 0 FIGURE 2-17: Temperature. 0 REF DD 0.3 0.2 0.1 0 -0.1 o +125 -0.2 4096 0 FIGURE 2-18: Temperature. MCP4728 = 5 kΩ 100 pF 5.5V Internal, Gain = x2 DD REF +85 C 1024 2048 3072 4096 Code DNL vs. Code and V = 2.7V Internal, Gain = x1 DD ...

Page 14

... MCP4728 Note: Unless otherwise indicated -40°C to +125° 2.7V REF + +125 + 1024 2048 3072 Code FIGURE 2-19: INL vs. Code and Temperature . - 2.7V, Gain = 5.5V, Gain = 1 DD -30 - 5.5V, Gain = 2 DD -50 -40 -25 - 110 125 o Temperature ( C) FIGURE 2-20: Full Scale Error vs. Temperature (Code = FFFh, V ...

Page 15

... V REF DD Code Change: FFFh to 000h). V (2V/Div) (2V/Div) OUT OUT LDAC FIGURE 2-30 REF DD Code Change: 7FFh to 000h). MCP4728 = 5 kΩ 100 pF (2V/Div) OUT Time (2 µs/Div) Full Scale Settling Time = 5V, UDAC = 1, DD Time (2 µs/Div) Full Scale Settling Time , V = 5V, UDAC = 1, DD Time (2 µ ...

Page 16

... MCP4728 Note: Unless otherwise indicated -40°C to +125° (2V/Div) OUT Time (2 µs/Div) LDAC FIGURE 2-31: Full Scale Settling Time (V = Internal 5V, UDAC = 1, REF DD Gain = x1, Code Change: FFFh to 000h). Time (2 µs/Div) LDAC FIGURE 2-32: Half Scale Settling Time (V = Internal 5V, UDAC = 1, REF DD Gain = x1, Code Change: 000h to 7FFh). ...

Page 17

... External REF DD Code Change: 800h to 7FFh. FIGURE 2-42: Code Change Glitch (V = Internal, V REF DD Load), Code Change: 800h to 7FFh. MCP4728 = 100 pF. L Time (5 µs/Div) V (50 mV/Div) OUT Time (2 µs/Div) = 5V, No External Load), V (50 mV/Div) OUT Time (2 µs/Div) = 5V, Gain = 1, No External DS22187E-page 17 ...

Page 18

... MCP4728 Note: Unless otherwise indicated -40°C to +125° Load Resistance (kΩ) FIGURE 2-43: V vs. Resistive Load. OUT 1000 All Channels 5.0V DD 800 3 Channels On 600 2 Channels On 400 200 1 Channel On 0 -40 -25 - 110 125 o Temperature ( C) FIGURE 2-44: I vs. Temperature 5V, Code = FFFh). DD REF DD 800 ...

Page 19

... All Channels are in Powered REF , Down). © 2010 Microchip Technology Inc. = +5. FIGURE 2-51 REF 110 125 FIGURE 2-52 REF DD MCP4728 = 5 kΩ 100 pF Code = FFFh Current (mA) Source Current Capability , Code = FFFh). Code = 000h Sink Current (mA) Sink Current Capability , Code = 000h). DS22187E-page 19 ...

Page 20

... MCP4728 NOTES: DS22187E-page 20 © 2010 Microchip Technology Inc. ...

Page 21

... DD SS SCL is the serial clock pin of the I MCP4728 device acts only as a slave and the SCL pin accepts only external input serial clocks. The input data from the Master device is shifted into the SDA pin on the rising edges of the SCL clock, and output from the MCP4728 occurs at the falling edges of the SCL clock ...

Page 22

... MCP4728 3.3 Serial Data Pin (SDA) 2 SDA is the serial data pin of the I C interface. The SDA pin is used to write or read the DAC register and EEPROM data. Except for Start and Stop conditions, the data on the SDA pin must be stable during the high duration of the clock pulse ...

Page 23

... THEORY OF DEVICE OPERATION The MCP4728 device is a 12-bit 4-channel buffered voltage output DAC with nonvolatile (EEPROM). The user can program the EEPROM with address bits, configuration and DAC input data of each channel. The device has an internal charge pump circuit to provide the programming voltage of the EEPROM ...

Page 24

... MCP4728 4.4 DAC Input Registers and Non-Volatile EEPROM Memory Each channel has its own volatile DAC input register and EEPROM. The details of the input registers and EEPROM are shown in Table 4-1 respectively. TABLE 4-1: INPUT REGISTER MAP (VOLATILE) Configuration Bits Bit ...

Page 25

... DAC latch bit. Upload the selected DAC input register to its output register ( Upload. Output ( not upload. Note: UDAC bit affects the selected channel only. © 2010 Microchip Technology Inc. Functions Section 5.3 “MCP4728 Device Addressing” and Figure 4-1 for more details. is selected REF REF ) is updated ...

Page 26

... However, it stays turned on if any one of the channels selects the internal reference. 4.6 LSB Size The LSB is defined as the ideal voltage difference between two successive codes. LSB sizes of the MCP4728 device are shown in Table 4-4. TABLE 4-4: LSB SIZES (EXAMPLE) Gain (G ...

Page 27

... OUT Nominal Output Voltage (V) Gain (See Note 1) Selection LSB Ignored REF 2 LSB REF LSB REF 2 LSB REF 2 LSB 2 LSB 1 LSB 1 LSB 0 0 MCP4728 REF DD Nominal Output Voltage ( LSB LSB DD 2 LSB 1 LSB 0 DS22187E-page 27 ...

Page 28

... MCP4728 4.10 Normal and Power-Down Modes Each channel has two modes of operation: (a) Normal mode where analog voltage is available and (b) Power-Down mode which turns off most of the internal circuits for power savings. The user can select the operating mode of each channel individually by setting the Power-Down selection bits (PD1 and PD0) ...

Page 29

... The first byte transmitted is always the slave (MCP4728) address byte, which contains the device code (1100), the address bits (A2, A1, A0), and the R/W bit. The device code for the MCP4728 device is 1100, and the address bits are user-writable. When the MCP4728 device receives a Read command (R/W = 1), it transmits the contents of the DAC input registers and EEPROM sequentially ...

Page 30

... During reads, a master must send an end of data to the slave by not generating an acknowledge bit on the last byte that has been clocked out of the slave. In this case, the slave (MCP4728) will leave the data line HIGH to enable the master to generate the STOP condition. ...

Page 31

... Refer to the 2 Philips I C document for more details of the General Call specifications. The MCP4728 device supports the following I General Calls: • General Call Reset • General Call Wake-Up • General Call Software Update • General Call Read Address Bits ...

Page 32

... Clock Pulse (CLK Line) Start 1st Byte (General Call Command) Data (SDA Line) Note 1: At this falling edge of the last ACK clock bit, V FIGURE 5-5: General Call Software Update. DS22187E-page the same ACK (MCP4728 2nd Byte (Command Type = General Call Software Update OUT ...

Page 33

... The MCP4728 device does not acknowledge the 3rd byte if the conditions (a) and (b) are not met. 3: LDAC pin resumes its normal function after “Stop” bit. FIGURE 5-6: General Call Read I © ...

Page 34

... MCP4728 5.5 Writing and Reading Registers and EEPROM The Master (MCU) can write or read the DAC input registers or EEPROM using the I command. The following sections describe the communication examples to write and read the DAC registers and 2 EEPROM using the I C interface. ...

Page 35

... By sending the General Call Software Update command. Note: The UDAC bit can be used effectively to upload the input register to the output register, but it affects only a selected channel only, while the LDAC pin and General Call Software Update command affect all channels. MCP4728 DS22187E-page 35 ...

Page 36

... MCP4728 5.6.3 SEQUENTIAL WRITE COMMAND: WRITE DAC INPUT REGISTERS AND EEPROM SEQUENTIALLY FROM STARTING CHANNEL TO CHANNEL D (C2=0, C1=1, C0=0; W1=1, W0=0) When the device receives this command, it writes the input data to the DAC input registers sequentially from the starting channel to channel D, and also writes to EEPROM sequentially ...

Page 37

... If the R/W bit is set to a logic “High” in the I communications command, the device enters a reading mode and reads out the input registers and EEPROM. Figure 5-15 command. Note: The device address bits are read by using General command. MCP4728 address bits (A2, A1, Figure 5-11 5.4.4 Bits command. See ...

Page 38

... Update Channel C DAC Input Register at this ACK pulse. 2nd Byte DAC Input Register of Channel D Update Channel D DAC Input Register at this ACK pulse. Repeat Bytes 3rd Byte ACK (MCP4728) 3rd Byte ACK (MCP4728) 3rd Byte ACK (MCP4728) 3rd Byte P Stop © 2010 Microchip Technology Inc. ...

Page 39

... ACK (MCP4728) 3rd Byte PD1 PD0 Gx D11 D10 REF DAC Input Register of Selected Channel Repeat Bytes of the 2nd - 4th Bytes ACK (MCP4728) 3rd Byte PD1 PD0 Gx D11 D10 REF DAC Input Register of Selected Channel Repeat Bytes of the 2nd - 4th Bytes is updated after the 4th byte’s ACK is issued. ...

Page 40

... If UDAC = 0 or LDAC Pin = EEPROM Write: The MCP4728 device starts writing EEPROM at the falling edge of the 4th byte’s ACK pulse. FIGURE 5-9: Sequential Write Command: Write DAC Input Registers and EEPROM Sequentially from Starting Channel to Channel D. The sequential input register starts with the "Starting Channel" and ends at Channel D ...

Page 41

... OUT If UDAC = 0 or LDAC Pin = EEPROM Write: The MCP4728 device starts writing EEPROM at the falling edge of the 4th byte’s ACK pulse. FIGURE 5-10: Single Write Command: Write to a Single DAC Input Register and EEPROM. © 2010 Microchip Technology Inc. C0=0 ...

Page 42

... The MCP4728 device does not acknowledge the 3rd byte if the conditions (a) and (b) are not met. 3: LDAC pin resumes its normal function after “Stop” bit. 4: EEPROM Write: a. Charge Pump initiates the EEPROM write sequence at the falling edge of the 4th byte’ ...

Page 43

... C1 C0) 2nd Byte REF R/W Write Command Registers and V at this falling edge of ACK pulse. C0=1 A ACK (MCP4728) PD1 C PD0 C PD1 D Channel B Channel C Channel D Registers and V at this falling edge of ACK pulse. MCP4728 Stop REF REF REF Note 1 are updated ...

Page 44

... C = Gain Selection for Channel Gain Selection for Channel Gain of 1 for Channel Gain of 2 for Channel don’t care bit. FIGURE 5-14: Write Command: Write Gain Selection Bit (G DS22187E-page 44 C0=0 ACK (MCP4728) ( R/W Write Command for Gain Selection Bits Registers and V at this falling edge of ACK pulse ...

Page 45

... Note 1: The 2nd - 4th bytes are the contents of the DAC Input Register and the 5th - 7th bytes are the EEPROM contents. The device outputs sequentially from channel POR Bit Set (Device is powered on with V FIGURE 5-15: Read Command and Device Outputs. © 2010 Microchip Technology Inc. ACK (MCP4728) A ACK (MASTER) 3rd Byte V PD1 PD0 G ...

Page 46

... MCP4728 NOTES: DS22187E-page 46 © 2010 Microchip Technology Inc. ...

Page 47

... Integral Nonlinearity (INL) Integral nonlinearity (INL) error is the maximum deviation of an actual transfer function from an ideal transfer function (straight line). In the MCP4728, INL is calculated using two end-points (zero and full scale). INL can be expressed as a percentage of full scale range (FSR fractions of an LSB. INL is also called relative accuracy ...

Page 48

... The gain error is usually expressed as percent of full scale range (% of FSR LSB. DS22187E-page 48 For the MCP4728 device, the gain error is not calibrated at the factory and most of the gain error is contributed by the output buffer (op amp) saturation near the code range beyond 4000. For applications that ...

Page 49

... In the MCP4728 device, the settling time is a measure of the time delay until the DAC output reaches its final value within 0.5 LSB when the DAC code changes from 400h to C00h ...

Page 50

... MCP4728 NOTES: DS22187E-page 50 © 2010 Microchip Technology Inc. ...

Page 51

... Microchip Technology Inc. 7.1 Connecting to I Pull-Up Resistors The SCL, SDA, and RDY/BSY pins of the MCP4728 device are open-drain configurations. These pins require a pull-up resistor, as shown in LDAC pin has a Schmitt trigger input configuration and it can be driven by an external MCU I/O pin. ...

Page 52

... MCP4728 7.1.1 DEVICE CONNECTION TEST The user can test the presence of the MCP4728 device 2 on the I C bus line without performing a data conversion. This test can be achieved by checking an acknowledge response from the MCP4728 device after sending a read or write command. Figure 7-2 example with a read command: a ...

Page 53

... Microchip Technology Inc. MCP4728 7.6.1 DC SET POINT OR CALIBRATION VOLTAGE SETTINGS A common application for the MCP4728 device is a digitally-controlled set point or a calibration of variable parameters such as sensor offset or bias point. Figure 7-3 shows an example of the set point settings. Let us consider that the application requires different trip voltages (Trip 1 - Trip 4) ...

Page 54

... Input Code (0 to 4095 × ----------- - G OUT REF x 4096 R ⎛ ⎞ ------------------ - ⎝ ⎠ TRIP OUT FIGURE 7-3: Using the MCP4728 for Set Point or Threshold Calibration. DS22187E-page 54 Light Light V DD 0.1 µF 10 µ OUT OUT OUT Light V A OUT 6 Analog Outputs To MCU Light ...

Page 55

... V ----------- - = V – 4096 4096 D 2048 × n × ----------- - × 2 ----------- - G = 2.048 = 2.048 x 4096 4096 D 4095 × n × ----------- - × 2 ----------- - G = 2.048 = 4.096 x 4096 4096 MCP4728 2048 ACK (MCP4728 4095 ACK (MCP4728 2048 ACK (MCP4728) Stop Dn = 4095 ) LSB Figure 7-3. DS22187E-page 55 ...

Page 56

... MCP4728 Start 1st Byte Address Byte Fast Mode Write Command The following example shows the expected analog outputs with the corresponding DAC input codes: DAC A Input Code = DAC B Input Code = DAC C Input Code = DAC D Input Code = ( V REF V OUT = --------------------------------- - G 4096 (A) Channel A Output: ...

Page 57

... DEVELOPMENT SUPPORT 8.1 Evaluation & Demonstration Boards The MCP4728 Evaluation Board is available from Microchip Technology Inc. This board works with Microchip’s PICkit™ Serial Analyzer. The user can easily program the DAC input registers and EEPROM using the PICkit Serial Analyzer, and test out the DAC analog output voltages ...

Page 58

... MCP4728 NOTES: DS22187E-page 58 © 2010 Microchip Technology Inc. ...

Page 59

... PACKAGING INFORMATION 9.1 Package Marking Information 10-Lead MSOP XXXXXX MCP4728-E/UN MCP4728T-E/UN YWWNNN MCP4728A0-E/UN MCP4728A0T-E/UN MCP4728A1-E/UN MCP4728A1T-E/UN MCP4728A2-E/UN MCP4728A2T-E/UN MCP4728A3-E/UN MCP4728A3T-E/UN MCP4728A4-E/UN MCP4728A4T-E/UN MCP4728A5-E/UN MCP4728A5T-E/UN MCP4728A6-E/UN MCP4728A6T-E/UN MCP4728A7-E/UN MCP4728A7T-E/UN Legend: XX... NNN Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information ...

Page 60

... MCP4728 /HDG 3ODVWLF 0LFUR 6PDOO 2XWOLQH 3DFNDJH 81 >0623@ 1RWH D N NOTE 1RWHV DS22187E-page φ © 2010 Microchip Technology Inc. ...

Page 61

... Plastic Micro Small Outline Package (UN) [MSOP] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging © 2010 Microchip Technology Inc. MCP4728 DS22187E-page 61 ...

Page 62

... MCP4728 NOTES: DS22187E-page 62 © 2010 Microchip Technology Inc. ...

Page 63

... Gain Error. Section 2.0 Typical Performance Curves: 4. Added new Figure 2-25: Absolute Gain Error. Page 45, Figure 5-15: 5. Changed (MCP4728) to ACK (MASTER). Revision C (September 2009) The following is the list of modifications: 6. Updated Figure 5-11 and Figure 7-4. Revision B (August 2009) The following is the list of modifications: 7 ...

Page 64

... MCP4728 NOTES: DS22187E-page 64 © 2010 Microchip Technology Inc. ...

Page 65

... These address bits are reprogrammable by the user. Tape and Reel Tape and Reel -40 ° +125 ° C Temperature Range Package Plastic Micro Small Outline Transistor, 10-lead © 2010 Microchip Technology Inc. Examples: -X /XX a) MCP4728-E/UN: Package b) MCP4728T-E/UN: c) MCP4728A0-E/UN: Address Option = A0 d) MCP4728A0T-E/UN:Address Option = MCP4728A1-E/UN: Address Option = A1 ...

Page 66

... MCP4728 NOTES: DS22187E-page 66 © 2010 Microchip Technology Inc. ...

Page 67

... PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 68

... Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Hsin Chu Tel: 886-3-6578-300 Fax: 886-3-6578-370 Taiwan - Kaohsiung Tel: 886-7-213-7830 Fax: 886-7-330-9305 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2010 Microchip Technology Inc. 08/04/10 ...

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