UDA1334ATS/N2,112 NXP Semiconductors, UDA1334ATS/N2,112 Datasheet

IC AUDIO DAC LP 16-SSOP

UDA1334ATS/N2,112

Manufacturer Part Number
UDA1334ATS/N2,112
Description
IC AUDIO DAC LP 16-SSOP
Manufacturer
NXP Semiconductors
Datasheet

Specifications of UDA1334ATS/N2,112

Number Of Converters
2
Package / Case
16-SSOP
Number Of Bits
24
Data Interface
Serial
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Interface Type
Serial
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.4 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power Dissipation (max)
-
Settling Time
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-3443-5
935266839112
UDA1334ATSDH
Product specification
Supersedes data of 2000 Feb 09
DATA SHEET
UDA1334ATS
Low power audio DAC with PLL
INTEGRATED CIRCUITS
2000 Jul 31

Related parts for UDA1334ATS/N2,112

UDA1334ATS/N2,112 Summary of contents

Page 1

DATA SHEET UDA1334ATS Low power audio DAC with PLL Product specification Supersedes data of 2000 Feb 09 INTEGRATED CIRCUITS 2000 Jul 31 ...

Page 2

... NXP Semiconductors Low power audio DAC with PLL CONTENTS 1 FEATURES 1.1 General 1.2 Multiple format data interface 1.3 DAC digital features 1.4 Advanced audio configuration 1.5 PLL system clock generation 2 APPLICATIONS 3 GENERAL DESCRIPTION 4 ORDERING INFORMATION 5 QUICK REFERENCE DATA 6 BLOCK DIAGRAM 7 PINNING ...

Page 3

... NXP Semiconductors Low power audio DAC with PLL 1 FEATURES 1.1 General • 2.4 to 3.6 V power supply voltage • On-board PLL to generate the internal system clock: – Operates as an asynchronous DAC, regenerating the internal clock from the WS signal (called audio mode) – Generates audio related system clock (output) based on 32 kHz sampling frequency (called video mode) ...

Page 4

... NXP Semiconductors Low power audio DAC with PLL 5 QUICK REFERENCE DATA SYMBOL PARAMETER Supplies V DAC analog supply voltage DDA V digital supply voltage DDD I DAC analog supply current DDA I digital supply current DDD T ambient temperature amb Digital-to-analog converter (V V output voltage (RMS value) ...

Page 5

... NXP Semiconductors Low power audio DAC with PLL 6 BLOCK DIAGRAM handbook, full pagewidth 1 BCK DATAI UDA1334ATS 6 SYSCLK/PLL1 8 MUTE 9 DEEM/CLKOUT 14 VOUTL 2000 Jul 31 V DDD 4 DIGITAL INTERFACE DE-EMPHASIS INTERPOLATION FILTER NOISE SHAPER DAC DDA V SSA Fig.1 Block diagram. 5 Product specification UDA1334ATS V SSD ...

Page 6

... NXP Semiconductors Low power audio DAC with PLL 7 PINNING SYMBOL PIN BCK tolerant digital input pad tolerant digital input pad DATAI tolerant digital input pad V 4 digital supply pad DDD V 5 digital ground pad SSD SYSCLK/PLL1 tolerant digital input pad SFOR1 ...

Page 7

... NXP Semiconductors Low power audio DAC with PLL 8 FUNCTIONAL DESCRIPTION 8.1 System clock The UDA1334ATS incorporates a PLL capable of generating the system clock. The UDA1334ATS can operate in 2 modes: • It operates as an asynchronous DAC, which means the device regenerates the internal clocks using a PLL from the incoming WS signal ...

Page 8

... NXP Semiconductors Low power audio DAC with PLL 8.4 Filter stream DAC The FSDAC is a semi-digital reconstruction filter that converts the 1-bit data stream of the noise shaper to an analog output voltage. The filter coefficients are implemented as current sources and are summed at virtual ground of the output operational amplifier ...

Page 9

... NXP Semiconductors Low power audio DAC with PLL 8.6 Feature settings 8.6.1 D IGITAL INTERFACE FORMAT SELECT The digital audio interface formats (see Fig.5) can be selected via pins SFOR1 and SFOR0 as shown in Table 4. For the digital audio interface holds that the BCK frequency can be maximum 64 times WS frequency. ...

Page 10

WS LEFT > BCK DATA MSB B2 MSB S-BUS FORMAT WS LEFT BCK DATA WS LEFT BCK DATA MSB LEFT 24 ...

Page 11

... NXP Semiconductors Low power audio DAC with PLL 9 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL PARAMETER V supply voltage DD T maximum crystal xtal(max) temperature T storage temperature stg T ambient temperature amb V electrostatic handling voltage human body model; note 2 ...

Page 12

... NXP Semiconductors Low power audio DAC with PLL SYMBOL PARAMETER Digital input pins: TTL compatible V HIGH-level input voltage IH V LOW-level input voltage IL ⎪I ⎪ input leakage current LI C input capacitance i 3-level input: pin PLL0 V HIGH-level input voltage IH V MID-level input voltage ...

Page 13

... NXP Semiconductors Low power audio DAC with PLL SYMBOL PARAMETER S/N signal-to-noise ratio α channel separation CS PSRR power supply rejection ratio Note 1. The output voltage of the DAC scales proportionally to the analog power supply voltage. 14.2 Timing 2 DDD DDA amb unless otherwise specified ...

Page 14

... NXP Semiconductors Low power audio DAC with PLL t CWH handbook, full pagewidth handbook, full pagewidth WS t BCKH t r BCK T cy(BCK) DATAI 2000 Jul 31 t CWL T sys Fig.6 Output clock timing. t h(WS) t su(WS BCKL Fig.7 Serial interface timing. 14 Product specification UDA1334ATS MGR984 ...

Page 15

... NXP Semiconductors Low power audio DAC with PLL 15 APPLICATION INFORMATION handbook, full pagewidth SYSCLK/PLL1 BCK WS DATAI SFOR1 SFOR0 MUTE DEEM/CLKOUT PLL0 In audio mode, the system does not need to supply a system clock. 2000 Jul 31 analog digital supply voltage supply voltage R7 1 Ω ...

Page 16

... NXP Semiconductors Low power audio DAC with PLL R5 27 MHz SYSCLK/PLL1 clock 47 Ω DATAI 2 SFOR1 I S-bus (master) SFOR0 MPEG DECODER MUTE DEEM/CLKOUT audio clock In video mode, a clock output signal is generated by the UDA1334ATS which is master for the audio signals in the system; the digital audio interface is slave, which means the system must generate the BCK and WS signal from the UDA1334ATS output clock ...

Page 17

... NXP Semiconductors Low power audio DAC with PLL 16 PACKAGE OUTLINE SSOP16: plastic shrink small outline package; 16 leads; body width 4 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 1.4 mm 1.5 0.25 0.00 1.2 Note 1. Plastic or metal protrusions of 0.2 mm maximum per side are not included. ...

Page 18

... NXP Semiconductors Low power audio DAC with PLL 17 SOLDERING 17.1 Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). ...

Page 19

... NXP Semiconductors Low power audio DAC with PLL 17.5 Suitability of surface mount IC packages for wave and reflow soldering methods PACKAGE BGA, LFBGA, SQFP, TFBGA HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS (3) PLCC , SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect) ...

Page 20

... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the ...

Page 21

... NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ ...

Page 22

... Interface, Security and Digital Processing expertise Customer notification This data sheet was changed to reflect the new company name NXP Semiconductors, including new legal definitions and disclaimers. No changes were made to the technical content, except for package outline drawings which were updated to the latest version. ...

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