CS4382A-CQZ Cirrus Logic Inc, CS4382A-CQZ Datasheet - Page 35

• Manufacturer Part Number: CS4382A-CQZ
• Description: IC DAC 8CH 114DB 192KHZ 48LQFP
• Manufacturer: Cirrus Logic Inc

Specifications of CS4382A-CQZ

• Package / Case: 48-LQFP
• Number Of Bits: 24
• Data Interface: Serial
• Number Of Converters: 8
• Voltage Supply Source: Analog and Digital
• Power Dissipation (max): 680mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Conversion Rate: 192 KSPS
• Resolution: 24 bit
• Interface Type: Serial
• Operating Supply Voltage: 5 V
• Operating Temperature Range: + 85 C
• Maximum Power Dissipation: 390 mW
• Mounting Style: SMD/SMT
• Number Of Dac Outputs: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1524 - BOARD EVAL FOR CS4382A DAC
• Settling Time: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1061

DS618F2
6.3
6.3.1
DIF2
SZC1
0
0
0
0
1
1
1
1
7
1
Mode Control 3 (Address 03h)
DSD Mode: The relationship between the oversampling ratio of the DSD audio data and the required
master clock-to-DSD-data-rate is defined by the Digital Interface Format pins.
Soft Ramp and Zero Cross Control (SZC)
Default = 10
00 - Immediate Change
01 - Zero Cross
10 - Soft Ramp
11 - Soft Ramp on Zero Crossings
Function:
Immediate Change
When Immediate Change is selected, all level changes will take effect immediately in one step.
Zero Cross
Zero Cross Enable dictates that signal level changes, either by attenuation changes or muting, will occur
on a signal zero crossing to minimize audible artifacts. The requested level change will occur after a time-
out period between 512 and 1024 sample periods (10.7 ms to 21.3 ms at 48 kHz sample rate) if the signal
does not encounter a zero crossing. The zero cross function is independently monitored and implemented
for each channel.
Soft Ramp
Soft Ramp allows level changes, both muting and attenuation, to be implemented by incrementally ramp-
ing, in 1/8 dB steps, from the current level to the new level at a rate of 1 dB per 8 left/right clock periods.
Soft Ramp on Zero Crossing
Soft Ramp and Zero Cross Enable dictates that signal level changes, either by attenuation changes or
muting, will occur in 1/8 dB steps and be implemented on a signal zero crossing. The 1/8 dB level change
will occur after a time-out period between 512 and 1024 sample periods (10.7 ms to 21.3 ms at 48 kHz
sample rate) if the signal does not encounter a zero crossing. The zero cross function is independently
monitored and implemented for each channel.
DIF1
0
0
1
1
0
0
1
1
SZC0
6
0
Table 6. Digital Interface Formats - DSD Mode
DIFO
SNGLVOL
0
1
0
1
0
1
0
1
5
0
64x oversampled DSD data with a 4x MCLK to DSD data rate
64x oversampled DSD data with a 6x MCLK to DSD data rate
64x oversampled DSD data with a 8x MCLK to DSD data rate
64x oversampled DSD data with a 12x MCLK to DSD data rate
128x oversampled DSD data with a 2x MCLK to DSD data rate
128x oversampled DSD data with a 3x MCLK to DSD data rate
128x oversampled DSD data with a 4x MCLK to DSD data rate
128x oversampled DSD data with a 6x MCLK to DSD data rate
RMP_UP
4
0
MUTEC+/-
DESCRIPTION
3
0
AMUTE
2
1
Reserved
1
0
CS4382A
MUTEC
0
0
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