CONV D/A 12BIT MICRO PWR TSOT236

DAC121S101CIMK/NOPB

Manufacturer Part NumberDAC121S101CIMK/NOPB
DescriptionCONV D/A 12BIT MICRO PWR TSOT236
ManufacturerNational Semiconductor
SeriesPowerWise®
DAC121S101CIMK/NOPB datasheet
 


Specifications of DAC121S101CIMK/NOPB

Settling Time12µsNumber Of Bits12
Data InterfaceDSP, MICROWIRE™, QSPI™, Serial, SPI™Number Of Converters1
Voltage Supply SourceSingle SupplyPower Dissipation (max)1.72mW
Operating Temperature-40°C ~ 105°CMounting TypeSurface Mount
Package / CaseTSOT-23-6, TSOT-6Number Of Channels1
Resolution12bInterface TypeSerial (3-Wire, SPI, QSPI, Microwire)
Single Supply Voltage (typ)3.3/5VDual Supply Voltage (typ)Not RequiredV
ArchitectureResistor-StringPower Supply RequirementSingle
Output TypeVoltageIntegral Nonlinearity Error±8LSB
Single Supply Voltage (min)2.7VSingle Supply Voltage (max)5.5V
Dual Supply Voltage (min)Not RequiredVDual Supply Voltage (max)Not RequiredV
Operating Temp Range-40C to 105COperating Temperature ClassificationIndustrial
MountingSurface MountPin Count6
Package TypeTSOTFor Use WithDAC121S101EVAL - BOARD EVALUATION DAC121S101
Lead Free Status / RoHS StatusLead free / RoHS CompliantOther namesDAC121S101CIMK
DAC121S101CIMKTR
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The output voltage of this circuit for any code is found to be
V
= (V
x (D / 4096) x ((R1 + R2) / R1) - V
O
A
where D is the input code in decimal form. With VA = 5V and
R1 = R2,
V
= (10 x D / 4096) - 5V
O
A list of rail-to-rail amplifiers suitable for this application are
indicated in
Table
2.
TABLE 2. Some Rail-to-Rail Amplifiers
 Typ V
AMP
PKGS
DIP-8
LMC7111
SOT23-5
SO-8
LM7301
0.03 mV
SOT23-5
LM8261
SOT23-5
2.4 LAYOUT, GROUNDING, AND BYPASSING
For best accuracy and minimum noise, the printed circuit
board containing the DAC121S101 should have separate
analog and digital areas. The areas are defined by the loca-
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tions of the analog and digital power planes. Both of these
planes should be located in the same board layer. There
x R2 / R1)
A
should be a single ground plane. A single ground plane is
preferred if digital return current does not flow through the
analog ground area. Frequently a single ground plane design
will utilize a "fencing" technique to prevent the mixing of ana-
log and digital ground current. Separate ground planes should
only be utilized when the fencing technique is inadequate.
The separate ground planes must be connected in one place,
preferably near the DAC121S101. Special care is required to
guarantee that digital signals with fast edge rates do not pass
Typ I
over split ground planes. They must always have a continu-
SUPPLY
OS
ous return path below their traces.
0.9 mV
25 µA
The DAC121S101 power supply should be bypassed with a
10µF and a 0.1µF capacitor as close as possible to the device
620 µA
with the 0.1µF right at the device supply pin. The 10µF ca-
pacitor should be a tantalum type and the 0.1µF capacitor
0.7 mV
1 mA
should be a low ESL, low ESR type. The power supply for the
DAC121S101 should only be used for analog circuits.
Avoid crossover of analog and digital signals and keep the
clock and data lines on the component side of the board. The
clock and data lines should have controlled impedances.
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