At startup, the following procedure should generally
be followed to properly initialize the DAC1220:
1. If the DAC1220 is being clocked from a crystal,
25ms—before attempting to communicate with it.
Trying to communicate with the DAC1220 before
the crystal oscillator has reached its final
2. Optionally apply the SCLK reset pattern. This
should also only be done once the oscillator is
started, since the pattern is detected using
oscillator cycles. Applying the reset pattern at
power-up ensures that the DAC1220 is reset
properly, and not lingering in an unknown state in
After a successful reset, the DAC1220 enters
3. Set up the Command Register as desired. This
may include changing the mode from Sleep to
Self Calibration or Normal.
4. Calibrate the DAC1220. Although this step is
optional, the DAC1220 should almost always be
calibrated. It is permissible to run calibration
every time, or to use values from a previous
calibration. See the
After calibration, the DAC1220 returns to Normal
mode. The DAC1220 is ready to accept data once it
is in Normal mode, but calibration or the use of saved
calibration values is highly recommended.
Calibration is governed by two registers. The Offset
determining the offset calibration, and the Full-Scale
Calibration Register (FCR) stores a value determining
the gain calibration.
The value in the OCR is scaled and additive. It has a
linear relationship to the generated offset calibration
voltage. The value in the FCR is scaled and
multiplicative. It has a linear relationship to the
generated gain calibration multiplier.
Copyright © 1998–2009, Texas Instruments Incorporated
SBAS082G – FEBRUARY 1998 – REVISED SEPTEMBER 2009
Since the calibration functions are linear, calibration
results can be averaged for greater precision. For
example, it may be beneficial to perform several
self-calibrations in succession, record the result of
each, average them together, and store the averages
in the OCR and FCR.
To perform a self-calibration, place the DAC1220 into
Self Calibration mode by setting the MD1 bit to '0'
and the MD0 bit to '1' in the Command Register. At a
clock frequency of 2.5MHz, self-calibration takes
between 300ms and 500ms; the actual time is
indeterminate and depends on the results.
If the CALPIN bit in the Command Register is '1', the
output remains connected during calibration. The
DAC voltage will change during the calibration
process. This can be important if the DAC output is
loaded significantly; disconnecting the output during
calibration places a high load impedance on the
output amplifier, which may be different from normal
If the CALPIN bit in the Command Register is '0', the
output will be disconnected during calibration. If this
is the case, when calibration begins, the DAC1220
briefly charges the C
section for details.
voltage. If the output is buffered, C
becomes a sample-and-hold capacitor, so that the
final output voltage remains during calibration.
When the calibration is complete, the DAC1220
switches to Normal mode. If the output was
disconnected, it is reconnected at that time. The end
of the calibration procedure can be detected by
polling the MD1 and MD0 bits. When they become 0,
the calibration is complete.
If readback is not being performed, simply wait at
least 500ms before sending further commands to the
device, assuming that the clock frequency is 2.5MHz.
Once calibration is complete, the OCR and FCR
contain the results of the calibration, and the new
constants are effective immediately.
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capacitor to the current output
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