The DAC1220 serial interface allows for connection
using as few as two wires. This is an advantage
when galvanic isolation is required. An example
isolated connection is shown in
chip-select is unused and therefore grounded, and
the DAC1220 is being operated unidirectionally.
As of this writing, there have been two released
revisions of the DAC1220. The only difference
between the two versions is bit 13 of the Command
Register. In the first revision, this bit was writable,
and defaulted to '0'. In the current revision, which was
released in 1999, this bit is fixed at '1', and is not
For first revision chips, always write a '1' to this bit.
Although the bit is not critical, performance is not
optimal unless this bit is set.
This does no harm in current revision chips, and
ensures that first revision chips perform optimally.
Definition of Terms
between an actual step width and the ideal value of
1LSB. If the step width is exactly 1LSB, the
differential nonlinearity error is zero. A differential
nonlinearity specification of less than 1LSB ensures
Drift—The change in a parameter over temperature.
Figure 13. Isolation for Two-Wire Interface
Copyright © 1998–2009, Texas Instruments Incorporated
SBAS082G – FEBRUARY 1998 – REVISED SEPTEMBER 2009
Full-Scale Range (FSR)—This is the magnitude of
the typical analog output voltage range, which is 2 ×
. For example, when the converter is configured
with a 2.5V reference, the Full-Scale range is 5.0V.
Gain Error—This error represents the difference in
the slope between the actual and ideal transfer
Linearity Error—The deviation of the actual transfer
function from an ideal straight line between the data
Least Significant Bit (LSB) Weight—This is the
ideal change in voltage that the analog output
changes with a change in the digital input code of
Monotonicity—Monotonicity assures that the analog
output will increase or stay the same for increasing
digital input codes.
Offset Error—The difference between the expected
and actual output, when the output is zero. The value
is calculated from measurements made when V
Settling Time—The time it takes the output to settle
to a new value after the digital code has been
—The frequency of the crystal oscillator or
CMOS-compatible input signal at the X
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input of the
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