AD5332BRUZ Analog Devices Inc, AD5332BRUZ Datasheet - Page 13

IC DAC 8BIT DUAL VOUT 20TSSOP

AD5332BRUZ

Manufacturer Part Number
AD5332BRUZ
Description
IC DAC 8BIT DUAL VOUT 20TSSOP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD5332BRUZ

Data Interface
Parallel
Settling Time
6µs
Number Of Bits
8
Number Of Converters
2
Voltage Supply Source
Single Supply
Power Dissipation (max)
1.8mW
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Resolution (bits)
8bit
Sampling Rate
167kSPS
Input Channel Type
Parallel
Supply Voltage Range - Analog
2.5V To 5.5V
Supply Current
300µA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD5332BRUZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Figure 23. I
V and V
REV. 0
FUNCTIONAL DESCRIPTION
The AD5332/AD5333/AD5342/AD5343 are dual DACs fabri-
cated on a CMOS process with resolutions of 8, 10, 12, and
12 bits, respectively. They are written to using a parallel inter-
face. They operate from single supplies of 2.5 V to 5.5 V and
the output buffer amplifiers offer rail-to-rail output swing. The
AD5333 and AD5342 have reference inputs that may be buff-
ered to draw virtually no current from the reference source.
Their output voltage range may be configured to be 0 to V
or 0 to 2 V
are unbuffered and their output range is 0 to V
have a power-down feature that reduces current consumption to
only 80 nA @ 3 V.
Digital-to-Analog Section
The architecture of one DAC channel consists of a reference
buffer and a resistor-string DAC followed by an output buffer
amplifier. The voltage at the V
voltage for the DAC. Figure 28 shows a block diagram of the
DAC architecture. Since the input coding to the DAC is straight
binary, the ideal output voltage is given by:
Figure 26. Full-Scale Error vs. V
–0.2
–0.4
0.2
0
0
100
0
T
V
A
REF
DD
= 25 C
150
V
= 2V
1
REF
= 5 V
DD
DD
= +3V
. The reference inputs of the AD5332 and AD5343
200
Histogram with V
2
V
V
I
DD
REF
OUT
250
3
– A
– V
=
300
4
V
REF
V
DD
350
REF
5
= +5V
×
DD
2
pin provides the reference
D
400
N
REF
= 3
6
×
Gain
Figure 24. AD5342 Major-Code Tran-
sition Glitch Energy
REF
0.939
0.938
0.937
0.936
0.935
0.934
0.933
0.932
0.931
0.930
0.929
. The devices
Figure 27. DAC-DAC Crosstalk
REF
750ns/DIV
–13–
500 ns/DIV
where:
D = decimal equivalent of the binary code which is loaded to
the DAC register:
N = DAC resolution
Gain = Output Amplifier Gain (1 or 2)
0–255 for AD5332 (8 Bits)
0–1023 for AD5333 (10 Bits)
0–4095 for AD5342/AD5343 (12 Bits)
REGISTER
INPUT
AD5332/AD5333/AD5342/AD5343
Figure 28. Single DAC Channel Architecture
REGISTER
DAC
Figure 25. Multiplying Bandwidth
(Small-Signal Frequency Response)
REFERENCE
–10
–20
–30
–40
–50
–60
BUFFER
10
0
0.01
RESISTOR
0.1
STRING
V
REF
FREQUENCY – kHz
1
BUFFER AMPLIFIER
10
OUTPUT
100
GAIN
BUF
1k
V
OUT
10k

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