AD5332BRUZ Analog Devices Inc, AD5332BRUZ Datasheet - Page 8

• Manufacturer Part Number: AD5332BRUZ
• Description: IC DAC 8BIT DUAL VOUT 20TSSOP
• Manufacturer: Analog Devices Inc

Specifications of AD5332BRUZ

• Data Interface: Parallel
• Settling Time: 6µs
• Number Of Bits: 8
• Number Of Converters: 2
• Voltage Supply Source: Single Supply
• Power Dissipation (max): 1.8mW
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 20-TSSOP
• Resolution (bits): 8bit
• Sampling Rate: 167kSPS
• Input Channel Type: Parallel
• Supply Voltage Range - Analog: 2.5V To 5.5V
• Supply Current: 300µA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD5332/AD5333/AD5342/AD5343
HBEN
LDAC
Pin
No.
1
2
3
4
5
6
7
8
9
10
11
12
13–20
CLR
DB
DB
WR
CS
A0
.
. . .
.
.
7
0
Mnemonic
HBEN
V
V
V
GND
CS
WR
A0
CLR
LDAC
PD
V
DB
INTER-
LOGIC
FACE
REF
OUT
OUT
DD
0
–DB
A
B
RESET
7
POWER-ON
HIGH BYTE
HIGH BYTE
LOW BYTE
LOW BYTE
REGISTER
REGISTER
REGISTER
REGISTER
RESET
AD5343 FUNCTIONAL BLOCK DIAGRAM
Function
This pin is used when writing to the device to determine if data is written to the high byte register or the
low byte register.
Unbuffered reference input for both DACs.
Output of DAC A. Buffered output with rail-to-rail operation.
Output of DAC B. Buffered output with rail-to-rail operation.
Ground reference point for all circuitry on the part.
Active Low Chip Select Input. This is used in conjunction with WR to write data to the parallel interface.
Active Low Write Input. This is used in conjunction with CS to write data to the parallel interface.
Address pin for selecting between DAC A and DAC B.
Asynchronous active low control input that clears all input registers and DAC registers to zeros.
Active low control input that updates the DAC registers with the contents of the input registers. This allows
all DAC outputs to be simultaneously updated.
Power-Down Pin. This active low control pin puts all DACs into power-down mode.
Power Supply Pin. These parts can operate from 2.5 V to 5.5 V and the supply should be decoupled with a
10 F capacitor in parallel with a 0.1 F capacitor to GND.
Eight Parallel Data Inputs. DB
REGISTER
REGISTER
DAC
DAC
AD5343 PIN FUNCTION DESCRIPTIONS
12-BIT
12-BIT
DAC
DAC
7
is the MSB of these eight bits.
V
REF
–8–
BUFFER
BUFFER
AD5343
POWER-DOWN
V
DD
LOGIC
PD
GND
V
V
OUT
OUT
B
A
AD5343 PIN CONFIGURATION
V
V
HBEN
LDAC
OUT
OUT
V
GND
CLR
REF
WR
CS
A0
A
B
10
2
3
4
5
6
7
8
9
1
(Not to Scale)
TOP VIEW
AD5343
12-BIT
19
18
17
16
15
14
13
12
11
20
DB
DB
DB
DB
DB
DB
DB
DB
V
PD
REV. 0
DD
7
6
5
4
3
2
1
0