74F521SCX National Semiconductor, 74F521SCX Datasheet

74F521SCX

Manufacturer Part Number
74F521SCX
Description
Manufacturer
National Semiconductor
Type
Identity Comparatorr
Datasheet

Specifications of 74F521SCX

Logic Family
F
Technology
Bipolar
Number Of Bits
8
High Level Output Current
-1mA
Low Level Output Current
20mA
Output Function
A=B
Package Type
SOIC
Mounting
Surface Mount
Pin Count
20
Polarity
Inverting
Abs. Propagation Delay Time
11ns
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74F521SCX
Manufacturer:
LT
Quantity:
56
Part Number:
74F521SCX
Manufacturer:
NS/国半
Quantity:
20 000
© 2000 Fairchild Semiconductor Corporation
74F521SC
74F521SJ
74F521MSA
74F521PC
74F521
8-Bit Identity Comparator
General Description
The 74F521 is an expandable 8-bit comparator. It com-
pares two words of up to eight bits each and provides a
LOW output when the two words match bit for bit. The
expansion input I
input.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
Order Number
A B
Package Number
also serves as an active LOW enable
MSA20
IEEE/IEC
M20B
M20D
N20A
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
DS009545
Features
Connection Diagram
Compares two 8-bit words in 6.5 ns typ
Expandable to any word length
20-pin package
Package Description
April 1988
Revised October 2000
www.fairchildsemi.com

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74F521SCX Summary of contents

Page 1

Identity Comparator General Description The 74F521 is an expandable 8-bit comparator. It com- pares two words eight bits each and provides a LOW output when the two words match bit for bit. The expansion input ...

Page 2

Unit Loading/Fan Out Pin Names A –A Word A Inputs –B Word B Inputs Expansion or Enable Input (Active LOW Identity Output (Active LOW Truth Table ...

Page 3

Absolute Maximum Ratings Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias V Pin Potential to Ground Pin CC Input Voltage (Note 3) Input Current (Note 5.0 mA Voltage Applied to Output in HIGH State ...

Page 4

AC Electrical Characteristics Symbol Parameter t Propagation Delay PLH PHL Propagation Delay PLH PHL Applications www.fairchildsemi.com ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B 5 www.fairchildsemi.com ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number M20D 6 ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide Package Number MSA20 7 www.fairchildsemi.com ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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