FST16210MTD_NL

Manufacturer Part NumberFST16210MTD_NL
ManufacturerFairchild Semiconductor
FST16210MTD_NL datasheet
 


Specifications of FST16210MTD_NL

Logic FamilyFSTNumber Of Bits20
Number Of Elements2TechnologyCMOS
Low Level Output Current128mAOn Resistance11Ohm
Package TypeTSSOPOperating Temp Range-40C to 85C
Operating Temperature ClassificationIndustrialOperating Supply Voltage (min)4V
Operating Supply Voltage (typ)5VOperating Supply Voltage (max)5.5V
Quiescent Current3uAPin Count48
MountingSurface MountLead Free Status / Rohs StatusCompliant
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FST16210
20-Bit Bus Switch
General Description
The Fairchild Switch FST16210 provides 20-Bits of high-
speed CMOS TTL-compatible bus switching. The low on
resistance of the switch allows inputs to be connected to
outputs without adding propagation delay or generating
additional ground bounce noise.
The device is organized as a 10-bit or 20-Bit bus switch.
When OE
is LOW, the switch is ON and Port 1A is con-
1
nected to Port 1B. When OE
is LOW, Port 2A is connected
2
to Port 2B.
Ordering Code:
Order Number
Package Number
FST16210MTD
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Pin Descriptions
Pin Name
Description
OE
, OE
Bus Switch Enables
1
2
1A, 2A
Bus A
1B, 2B
Bus B
© 2005 Fairchild Semiconductor Corporation
Features
:
4
switch connection between two ports.
Minimal propagation delay through the switch.
Low l
.
CC
Zero bounce in flow-through mode.
Control inputs compatible with TTL level.
Package Description
Logic Diagram
Truth Table
Inputs
OE
OE
1
2
L
L
L
H
H
L
H
H
DS500193
November 1998
Revised June 2005
Inputs/Outputs
1A, 1B
2A, 2B
1A
1B
2A
2B
1A
1B
Z
Z
2A
2B
Z
Z
www.fairchildsemi.com

FST16210MTD_NL Summary of contents

  • Page 1

    ... Pin Name Description Bus Switch Enables 1 2 1A, 2A Bus A 1B, 2B Bus B © 2005 Fairchild Semiconductor Corporation Features : 4 switch connection between two ports. Minimal propagation delay through the switch. Low Zero bounce in flow-through mode. Control inputs compatible with TTL level. Package Description ...

  • Page 2

    Absolute Maximum Ratings Supply Voltage ( Switch Voltage ( Input Voltage (V ) (Note Input Diode Current ( Output (I ) Sink Current OUT ...

  • Page 3

    AC Electrical Characteristics Symbol Parameter t ,t Propagation Delay Bus to Bus PHL PLH (Note Output Enable Time PZH PZL Output Disable Time PHZ PLZ Note 6: This parameter is guaranteed by design ...

  • Page 4

    Physical Dimensions inches (millimeters) unless otherwise noted 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Technology Description The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its 74LVX3L384(FST3384) bus ...