PRIXP425ABD Intel, PRIXP425ABD Datasheet - Page 34

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PRIXP425ABD

Manufacturer Part Number
PRIXP425ABD
Description
Manufacturer
Intel
Datasheet

Specifications of PRIXP425ABD

Core Operating Frequency
533MHz
Package Type
BGA
Pin Count
492
Mounting
Surface Mount
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Compliant

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Functional Signal Descriptions
Table 8.
June 2007
34
PCI Controller (Sheet 1 of 2)
PCI_AD[31:0]
PCI_CBE_N[3:0]
PCI_PAR
PCI_FRAME_N
PCI_TRDY_N
PCI_IRDY_N
PCI_STOP_N
PCI_PERR_N
PCI_SERR_N
PCI_DEVSEL_N
PCI_IDSEL
PCI_REQ_N[3:1]
††
Name
For a legend of the Type codes, see
For new designs, this signal should be pulled high with a 10-KΩ resistor when not being utilized in the system. No change is required to existing designs
that have this signal pulled low.
Power
or Sys
Reset
Reset
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Reset
Post
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Type
I/OD
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I
Table 5 on page
PCI Address/Data bus used to transfer address and bidirectional data to and from multiple PCI devices.
Should be pulled high
PCI Command/Byte Enables is used as a command word during PCI address cycles and as byte enables for data
cycles.
Should be pulled high with a 10-KΩ resistor when not being utilized in the system.
PCI Parity used to check parity across the 32 bits of PCI_AD and the four bits of PCI_CBE_N.
Should be pulled high
PCI Cycle Frame used to signify the beginning and duration of a transaction. The signal will be inactive prior to or
during the final data phase of a given transaction.
Should be pulled high with a 10-KΩ resistor when not being utilized in the system.
PCI Target Ready informs that the target of the PCI bus is ready to complete the current data phase of a given
transaction.
Should be pulled high with a 10-KΩ resistor when not being utilized in the system.
PCI Initiator Ready informs the PCI bus that the initiator is ready to complete the transaction.
Should be pulled high with a 10-KΩ resistor when not being utilized in the system.
PCI Stop indicates that the current target is requesting the current initiator to stop the current transaction.
Should be pulled high with a 10-KΩ resistor when not being utilized in the system.
PCI Parity Error asserted when a PCI parity error is detected — between the PCI_PAR and associated information
on the PCI_AD bus and PCI_CBE_N — during all PCI transactions, except for Special Cycles. The agent receiving
data will drive this signal.
Should be pulled high with a 10-KΩ resistor when not being utilized in the system.
PCI System Error asserted when a parity error occurs on special cycles or any other error that will cause the PCI
bus not to function properly. This signal can function as an input or an open drain output.
Should be pulled high with a 10-KΩ resistor when not being utilized in the system.
PCI Device Select:
Should be pulled high with a 10-KΩ resistor when not being utilized in the system.
PCI Initialization Device Select is a chip select during configuration reads and writes.
Should be pulled high with a 10-KΩ resistor when not being utilized in the system.
PCI arbitration request: Used by the internal PCI arbiter to allow an agent to request the PCI bus.
Should be pulled high with a 10-KΩ resistor when not being utilized in the system.
• When used as an output, PCI_DEVSEL_N indicates that device has decoded that address as the target of the
• When used as an input, PCI_DEVSEL_N indicates if any device on the PCI bus exists with the given address.
requested transaction.
30.
††
††
with a 10-KΩ resistor when not being utilized in the system.
with a 10-KΩ resistor when not being utilized in the system.
Intel
®
IXP45X and Intel
Description
®
IXP46X Product Line of Network Processors Datasheet
Document Number:
252479-007US

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