PRIXP420ABB 885158 Intel, PRIXP420ABB 885158 Datasheet - Page 3

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PRIXP420ABB 885158

Manufacturer Part Number
PRIXP420ABB 885158
Description
Manufacturer
Intel
Datasheet

Specifications of PRIXP420ABB 885158

Lead Free Status / Rohs Status
Compliant
Contents—Intel
Contents
1.0
2.0
3.0
December 2007
Document Number: 252817-008US
Introduction .............................................................................................................. 9
1.1
1.2
1.3
1.4
1.5
1.6
System Architecture ................................................................................................ 15
2.1
2.2
General Hardware Design Considerations ................................................................ 19
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
3.10
3.11
About this Document ........................................................................................... 9
Related Documentation ........................................................................................ 9
Acronyms and Abbreviations ............................................................................... 10
Overview ......................................................................................................... 11
Key Features .................................................................................................... 11
Typical Applications ........................................................................................... 14
System Architecture Description .......................................................................... 15
System Memory Map ......................................................................................... 16
PC133 SDRAM Interface ..................................................................................... 19
3.1.1
3.1.2
3.1.3
Expansion Bus .................................................................................................. 25
3.2.1
3.2.2
3.2.3
3.2.4
3.2.5
UART Interface ................................................................................................. 29
3.3.1
3.3.2
3.3.3
MII Interface .................................................................................................... 32
3.4.1
3.4.2
GPIO Interface.................................................................................................. 35
3.5.1
3.5.2
I
3.6.1
3.6.2
USB Interface ................................................................................................... 38
3.7.1
3.7.2
3.7.3
UTOPIA Interface .............................................................................................. 40
3.8.1
3.8.2
HSS Interface ................................................................................................... 42
3.9.1
3.9.2
PCI Interface .................................................................................................... 44
3.10.1 PCI Interface Signals .............................................................................. 45
3.10.2 PCI Interface Block Diagram .................................................................... 47
3.10.3 Design Notes ......................................................................................... 47
JTAG Interface .................................................................................................. 48
®
2
C Interface .................................................................................................... 36
IXP42X product line and IXC1100 control plane processors
SDRAM Interface Signals ......................................................................... 20
SDRAM Block Diagrams........................................................................... 20
SDRAM Initialization ............................................................................... 24
Expansion Bus Interface Signals ............................................................... 26
Configuration Straps ............................................................................... 26
3.2.2.1
Flash Interface....................................................................................... 28
SRAM Interface ...................................................................................... 28
Design Notes ......................................................................................... 29
UART Interface Signals ........................................................................... 29
High-Speed UART................................................................................... 30
Console UART ........................................................................................ 31
Ethernet Interface Signals ....................................................................... 33
MII Block Diagram.................................................................................. 35
GPIO Interface Signals ............................................................................ 36
Design Notes ......................................................................................... 36
Pull-Ups and Pull-Downs.......................................................................... 38
Layout Notes ......................................................................................... 38
Signals ................................................................................................. 38
USB Interface ........................................................................................ 39
Design Notes ......................................................................................... 39
Interface Signals .................................................................................... 40
UTOPIA-2 Interface Block Diagram ........................................................... 42
Interface Signals .................................................................................... 43
HSS Interface Block Diagram ................................................................... 44
User-Configurable Field.............................................................. 27
Intel
®
IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor
Hardware Design Guidelines
3

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