PRIXP420ABB 885158 Intel, PRIXP420ABB 885158 Datasheet - Page 68

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PRIXP420ABB 885158

Manufacturer Part Number
PRIXP420ABB 885158
Description
Manufacturer
Intel
Datasheet

Specifications of PRIXP420ABB 885158

Lead Free Status / Rohs Status
Compliant
6.3.5
Intel
Hardware Design Guidelines
68
®
IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor
EMI Design Considerations
It is strongly recommended that good electromagnetic interference (EMI) design
practices be followed when designing with the IXP42X product line and IXC1100 control
plane processors.
• To effectively route signals on the PCB, signals are grouped (address, data, etc.).
• It is also recommended to specify the height of above the reference plane when
• Information on spread-spectrum clocking is available in Intel
• To minimize EMI on your PCB, do not extend the power planes to the edge of the
• Another technique is to surround the perimeter of your PCB layers with a GND
• Keep crystal and oscillators away from the processor I/O ports and SDRAM bus and
• Connect the crystal retaining straps to the ground plane. These straps, if
• Place high-current devices as closely as possible to the power sources.
• Locate grounds to minimize the loop area between a signal path and its return
• Provide a ground pad of equal or larger footprint under crystals and oscillators on
• Proper termination of signals can reduce the reflections. The reflections of a signal
• Ferrite beads may be used to add high frequency loss to a circuit without
• Keep rise and fall times as slow as possible. Signals with fast rise and fall times
• A solid ground is essential at the I/O connector to chassis and ground plane.
• Route all traces over a continuous ground plane, with no interruptions. If there are
• Connect all the SDRAM signals and sensitive signal returns closest to the chassis
• Keep the power plane shorter than the ground plane by at least 5x the spacing
The space between groups can be 3 w (where w is the width of the traces). Space
within a group can be just 1 w. Space between clock signals or clock to any other
signal should be 3 w. The coupled noise between adjacent traces decreases by the
square of the distance between the adjacent traces.
laying out traces and provide this parameter to the PCB manufacturer. By moving
traces closer to the nearest reference plane the coupled noise decreases by the
square of the distance to the reference plane.
of Network Processors and IXC1100 Control Plane Processor: Spread-Spectrum
Clocking to Reduce EMI Application Note.
board.
trace. This helps to shield the PCB with grounds, minimizing radiation.
board edges. EMI from these devices can be coupled onto the I/O ports and SDRAM
bus.
ungrounded, can behave as antennae and radiate.
path.
the component side of the board. This ground pad should be tied to the ground
plane(s) with multiple vias.
may have a high-frequency component that may contribute more EMI than the
original signal itself.
introducing power loss at DC and low frequencies. They are effective when used to
dampen high-frequency oscillations from switching transients or parasitic
resonances within a circuit.
contain many high-frequency harmonics which may radiate significantly.
vacant areas on a ground or power plane, do not allow signal conductors to cross
the vacant area. This increases inductance and radiation levels.
ground.
between the power and ground planes.
Intel
®
IXP42X product line and IXC1100 control plane processors—General Layout and Routing
Document Number: 252817-008US
®
IXP42X Product Line
December 2007
Guide

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