PRIXP425ABC 885156 Intel, PRIXP425ABC 885156 Datasheet - Page 17

• Manufacturer Part Number: PRIXP425ABC 885156
• Manufacturer: Intel

Specifications of PRIXP425ABC 885156

• Lead Free Status / Rohs Status: Supplier Unconfirmed

System Architecture—Intel
Table 1.
December 2007
Document Number: 252817-008US
Memory Map
†
• When bit 31 (MEM_MAP) of configuration register #0 (EXP_CNFG0) is set to logic 1, the Expansion Bus
• When bit 31 (MEM_MAP) of configuration register #0 (EXP_CNFG0) is set to logic 0 the SDRAM
Start Address
0000_0000
0000_0000
3000_0000
4000_0000
4800_0000
5000_0000
6000_0000
6400_0000
C000_0000
C400_0000
C800_0000
C800_1000
C800_2000
C800_3000
C800_4000
C800_5000
C800_6000
C800_7000
C800_8000
C800_9000
C800_A000
C800_B000
C800_C000
C801_0000
CC00_0000
CC00_0100
occupies the lowest 256 Mbytes of address space.
occupies the lowest 256 Mbytes of address space starting at 5000_0000 while the SDRAM occupies the
lowest 256 MB of address address space.
In both cases, regardless of the value of MEM_MAP, the SDRAM occupies the 768 MB (1000_0000 to
2FFF_FFFF) immediately following the lowest 256 MB and the Expansion Bus can be accessed starting
at address 5000_0000.
The largest SDRAM memory size supported by the Intel
and IXC1100 Control Plane Processor is 256 Mbytes. The actual memory implemented in any given
configuration will be aliased (repeated) to fill the 1-Gbyte SDRAM address space. Due to aliasing, all of
the SDRAM will be accessible even when the Expansion Bus occupies the lowest 256 Mbytes of address
space. On reset, bit 31 (MEM_MAP) of the Configuration Register #0 (EXP_CNFG0) will be set to logic
1. This setting is required because the dedicated boot memory is flash memory located on the
Expansion Bus.
Details in the Intel
Developer’s Manual.
The lowest 256 Mbyte of address space is configurable based on the value of a configuration
register bit located in the Expansion Bus Controller (bit 31 of EXP_CNFG0.)
®
IXP42X product line and IXC1100 control plane processors
End Address
®
Intel
C800_AFFF
C800_BFFF
CC00_00FF
C800_0FFF
C800_1FFF
C800_2FFF
C800_3FFF
C800_4FFF
C800_5FFF
C800_6FFF
C800_7FFF
C800_8FFF
C800_9FFF
C800_FFFF
47FF_FFFF
63FF_FFFF
BFFF_FFFF
C3FF_FFFF
C7FF_FFFF
CBFF_FFFF
0FFF_FFFF
2FFF_FFFF
3FFF_FFFF
4FFF_FFFF
5FFF_FFFF
FFFF_FFFF
IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor
®
IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor
256 Byte
256 MB
768 MB
128 MB
256 MB
64 MB
64 MB
64 MB
Size
1 KB
1 KB
1 KB
1 KB
1 KB
1 KB
1 KB
1 KB
1 KB
1 KB
1 KB
1 KB
Expansion Bus Data (Mirrored)/SDRAM Data
SDRAM Data (Aliased)
(Reserved)
(Reserved)
PCI Data
Expansion Bus Data
Queue manager
(Reserved)
PCI Controller Configuration and Status Registers
Expansion Bus Configuration Registers
High-Speed UART
Console UART
Internal Bus Performance Monitoring Unit
Interrupt Controller
GPIO Controller
Timers
WAN/HSS NPE = NPE A (IXP400 software definition)
– Not User Programmable
Ethernet NPE A = NPE B (IXP400 software definition)
– Not User Programmable
Ethernet NPE B = NPE C (IXP400 software definition)
– Not User Programmable
Ethernet MAC A
Ethernet MAC B
USB Controller
(Reserved)
(Reserved)
SDRAM Configuration Registers
(Reserved)
®
IXP42X Product Line of Network Processors
†
Use
Hardware Design Guidelines
†
17